diff --git a/samples/drivers/espi/boards/mec172xevb_assy6906.overlay b/samples/drivers/espi/boards/mec172xevb_assy6906.overlay
new file mode 100644
index 00000000000..c65331784c5
--- /dev/null
+++ b/samples/drivers/espi/boards/mec172xevb_assy6906.overlay
@@ -0,0 +1,52 @@
+/*
+ * Copyright (c) 2020 Intel Corporation
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	board_power: resources {
+		compatible = "microchip,mec172x-board-power";
+		/* MCHP_GPIO_012 */
+		pwrg-gpios = <&gpio_000_036 10 GPIO_ACTIVE_HIGH>;
+		/* MCHP_GPIO_0054 */
+		rsm-gpios = <&gpio_040_076 12 GPIO_ACTIVE_HIGH>;
+	};
+};
+
+&espi_saf0 {
+	status = "okay";
+};
+
+/* Enable Target to Controller Virtual Wires GPIO 0 - 3 */
+&vw_t2c_gpio_0 {
+	status = "okay";
+	reset-state = "1";
+	reset-source = "ESPI_RESET";
+};
+
+&vw_t2c_gpio_1 {
+	status = "okay";
+	reset-state = "1";
+	reset-source = "ESPI_RESET";
+};
+
+&vw_t2c_gpio_2 {
+	status = "okay";
+	reset-state = "1";
+	reset-source = "ESPI_RESET";
+};
+
+&vw_t2c_gpio_3 {
+	status = "okay";
+	reset-state = "1";
+	reset-source = "ESPI_RESET";
+};
+
+&spi0 {
+	status = "okay";
+	clock-frequency = <24000000>;
+	port-sel = <0>;
+	chip-select = <0>;
+	lines = <4>;
+};
diff --git a/samples/drivers/espi/dts/bindings/mec172x-board-power.yaml b/samples/drivers/espi/dts/bindings/mec172x-board-power.yaml
new file mode 100644
index 00000000000..8506c524d13
--- /dev/null
+++ b/samples/drivers/espi/dts/bindings/mec172x-board-power.yaml
@@ -0,0 +1,24 @@
+# Copyright (c) 2020, Microchip Technology Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+compatible: "microchip,mec172x-board-power"
+
+description: |
+    This binding provides MEC172x board gpio power rails resources to
+    build and run samples/drives/espi in Zephyr.
+    GPIOs required before performing a eSPI host-slave handshake
+
+properties:
+  pwrg-gpios:
+    type: phandle-array
+    required: true
+    description: |
+      Board GPIO input used to detect that power rails are stable.
+
+  rsm-gpios:
+    type: phandle-array
+    required: true
+    description: |
+      Board GPIO output used to notify eSPI master to ackwnowledge
+      power has stabilized and bare minimum initialization in eSPI slave
+      is complete so eSPI master can proceed with eSPI handshake.
diff --git a/samples/drivers/espi/prj_mec172xevb_assy6906.conf b/samples/drivers/espi/prj_mec172xevb_assy6906.conf
new file mode 100644
index 00000000000..ecdb27d5f61
--- /dev/null
+++ b/samples/drivers/espi/prj_mec172xevb_assy6906.conf
@@ -0,0 +1,13 @@
+# eSPI + mec172xevb_assy6906
+CONFIG_ESPI=y
+CONFIG_LOG=y
+CONFIG_LOG_BUFFER_SIZE=4096
+CONFIG_LOG_PROCESS_THREAD_SLEEP_MS=100
+# Disable only for this board to check notifications
+CONFIG_ESPI_AUTOMATIC_WARNING_ACKNOWLEDGE=n
+# Sample code doesn't handle ACPI host communication
+CONFIG_ESPI_PERIPHERAL_HOST_IO=n
+# Test SAF flash portal read/erase/write on EVB
+CONFIG_ESPI_SAF=y
+CONFIG_SPI=y
+CONFIG_SPI_XEC_QMSPI_LDMA=y
diff --git a/samples/drivers/espi/src/main.c b/samples/drivers/espi/src/main.c
index b17b154f529..7bdef1e53a4 100644
--- a/samples/drivers/espi/src/main.c
+++ b/samples/drivers/espi/src/main.c
@@ -133,6 +133,25 @@ static const struct espi_saf_flash_cfg flash_w25q128 = {
  * by QMSPI driver.
  * Use SAF hardware default TAG map.
  */
+#ifdef CONFIG_ESPI_SAF_XEC_V2
+static const struct espi_saf_cfg saf_cfg1 = {
+	.nflash_devices = 1U,
+	.hwcfg = {
+		.version = 2U, /* TODO */
+		.flags = 0U, /* TODO */
+		.qmspi_cpha = 0U, /* TODO */
+		.qmspi_cs_timing = 0U, /* TODO */
+		.flash_pd_timeout = 0U, /* TODO */
+		.flash_pd_min_interval = 0U, /* TODO */
+		.generic_descr = {
+			MCHP_SAF_EXIT_CM_DESCR12, MCHP_SAF_EXIT_CM_DESCR13,
+			MCHP_SAF_POLL_DESCR14, MCHP_SAF_POLL_DESCR15
+		},
+		.tag_map = { 0U, 0U, 0U }
+	},
+	.flash_cfgs = (struct espi_saf_flash_cfg *)&flash_w25q128
+};
+#else
 static const struct espi_saf_cfg saf_cfg1 = {
 	.nflash_devices = 1U,
 	.hwcfg = {
@@ -148,6 +167,7 @@ static const struct espi_saf_cfg saf_cfg1 = {
 	},
 	.flash_cfgs = (struct espi_saf_flash_cfg *)&flash_w25q128
 };
+#endif
 
 /*
  * Example for SAF driver set protection regions API.