From b263a3379c3f0ca1a6dbaecfa898740e78b55f06 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 2 Apr 2020 08:37:21 -0500 Subject: [PATCH] soc: riscv: openisa_rv32m1: Convert from Kconfig to DT_NODELABEL As prep for drivers being converted to utilize DT_INST and removal of per instance Kconfig symbols, move soc.c code to utilize DT_NODELABEL instead. Also rename various node labels to match the SoC docs. Signed-off-by: Kumar Gala --- boards/riscv/rv32m1_vega/rv32m1_vega.dtsi | 20 ++--- .../riscv/rv32m1_vega/rv32m1_vega_ri5cy.dts | 6 +- .../rv32m1_vega/rv32m1_vega_zero_riscy.dts | 4 +- dts/riscv/rv32m1.dtsi | 84 +++++++++---------- dts/riscv/rv32m1_ri5cy.dtsi | 32 +++---- dts/riscv/rv32m1_zero_riscy.dtsi | 32 +++---- soc/riscv/openisa_rv32m1/soc.c | 8 +- 7 files changed, 93 insertions(+), 93 deletions(-) diff --git a/boards/riscv/rv32m1_vega/rv32m1_vega.dtsi b/boards/riscv/rv32m1_vega/rv32m1_vega.dtsi index 41e44d6964a..4539eea2a96 100644 --- a/boards/riscv/rv32m1_vega/rv32m1_vega.dtsi +++ b/boards/riscv/rv32m1_vega/rv32m1_vega.dtsi @@ -44,15 +44,15 @@ pwmleds { compatible = "pwm-leds"; blue_pwm_led: pwm_led_0 { - pwms = <&pwm2 2 0 0>; + pwms = <&tpm2 2 0 0>; label = "User PWM LD1"; }; green_pwm_led: pwm_led_1 { - pwms = <&pwm2 1 0 0>; + pwms = <&tpm2 1 0 0>; label = "User PWM LD2"; }; red_pwm_led: pwm_led_2 { - pwms = <&pwm2 0 0 0>; + pwms = <&tpm2 0 0 0>; label = "User PWM LD3"; }; }; @@ -107,18 +107,18 @@ }; }; -arduino_serial: &uart1 {}; +arduino_serial: &lpuart1 {}; -&uart0 { +&lpuart0 { current-speed = <115200>; status = "okay"; }; -arduino_i2c: &i2c0 { +arduino_i2c: &lpi2c0 { status = "okay"; }; -&i2c3 { +&lpi2c3 { status = "okay"; fxos8700@1e { @@ -131,11 +131,11 @@ arduino_i2c: &i2c0 { }; }; -arduino_spi: &spi0 { +arduino_spi: &lpspi0 { status = "okay"; }; -&spi1 { +&lpspi1 { status = "okay"; cs-gpios = <&gpiob 22 0>; mx25r32: mx25r3235f@0 { @@ -149,6 +149,6 @@ arduino_spi: &spi0 { }; }; -&pwm2 { +&tpm2 { status = "okay"; }; diff --git a/boards/riscv/rv32m1_vega/rv32m1_vega_ri5cy.dts b/boards/riscv/rv32m1_vega/rv32m1_vega_ri5cy.dts index c1a90a7d1cd..f55f8cc0d75 100644 --- a/boards/riscv/rv32m1_vega/rv32m1_vega_ri5cy.dts +++ b/boards/riscv/rv32m1_vega/rv32m1_vega_ri5cy.dts @@ -15,9 +15,9 @@ chosen { zephyr,sram = &m4_dtcm; zephyr,flash = &m4_flash; - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; - zephyr,uart-pipe = &uart0; + zephyr,console = &lpuart0; + zephyr,shell-uart = &lpuart0; + zephyr,uart-pipe = &lpuart0; zephyr,code-partition = &slot0_partition; }; }; diff --git a/boards/riscv/rv32m1_vega/rv32m1_vega_zero_riscy.dts b/boards/riscv/rv32m1_vega/rv32m1_vega_zero_riscy.dts index aba70a32738..07964d9e6b0 100644 --- a/boards/riscv/rv32m1_vega/rv32m1_vega_zero_riscy.dts +++ b/boards/riscv/rv32m1_vega/rv32m1_vega_zero_riscy.dts @@ -15,8 +15,8 @@ chosen { zephyr,sram = &m0_tcm; zephyr,flash = &m0_flash; - zephyr,console = &uart0; - zephyr,uart-pipe = &uart0; + zephyr,console = &lpuart0; + zephyr,uart-pipe = &lpuart0; zephyr,code-partition = &zero_riscy_code_partition; }; }; diff --git a/dts/riscv/rv32m1.dtsi b/dts/riscv/rv32m1.dtsi index 01fad8f01e1..bbdd29b542e 100644 --- a/dts/riscv/rv32m1.dtsi +++ b/dts/riscv/rv32m1.dtsi @@ -14,32 +14,32 @@ aliases { pcc-0 = &pcc0; pcc-1 = &pcc1; - pinmux-a = &pinmux_a; - pinmux-b = &pinmux_b; - pinmux-c = &pinmux_c; - pinmux-d = &pinmux_d; - pinmux-e = &pinmux_e; + pinmux-a = &porta; + pinmux-b = &portb; + pinmux-c = &portc; + pinmux-d = &portd; + pinmux-e = &porte; gpio-a = &gpioa; gpio-b = &gpiob; gpio-c = &gpioc; gpio-d = &gpiod; gpio-e = &gpioe; - uart-0 = &uart0; - uart-1 = &uart1; - uart-2 = &uart2; - uart-3 = &uart3; - i2c-0 = &i2c0; - i2c-1 = &i2c1; - i2c-2 = &i2c2; - i2c-3 = &i2c3; - spi-0 = &spi0; - spi-1 = &spi1; - spi-2 = &spi2; - spi-3 = &spi3; - pwm-0 = &pwm0; - pwm-1 = &pwm1; - pwm-2 = &pwm2; - pwm-3 = &pwm3; + uart-0 = &lpuart0; + uart-1 = &lpuart1; + uart-2 = &lpuart2; + uart-3 = &lpuart3; + i2c-0 = &lpi2c0; + i2c-1 = &lpi2c1; + i2c-2 = &lpi2c2; + i2c-3 = &lpi2c3; + spi-0 = &lpspi0; + spi-1 = &lpspi1; + spi-2 = &lpspi2; + spi-3 = &lpspi3; + pwm-0 = &tpm0; + pwm-1 = &tpm1; + pwm-2 = &tpm2; + pwm-3 = &tpm3; }; cpus { @@ -304,31 +304,31 @@ label = "LPTMR_2"; }; - pinmux_a: pinmux@40046000 { + porta: pinmux@40046000 { compatible = "openisa,rv32m1-pinmux"; reg = <0x40046000 0xd0>; clocks = <&pcc0 0x118>; }; - pinmux_b: pinmux@40047000 { + portb: pinmux@40047000 { compatible = "openisa,rv32m1-pinmux"; reg = <0x40047000 0xd0>; clocks = <&pcc0 0x11c>; }; - pinmux_c: pinmux@40048000 { + portc: pinmux@40048000 { compatible = "openisa,rv32m1-pinmux"; reg = <0x40048000 0xd0>; clocks = <&pcc0 0x120>; }; - pinmux_d: pinmux@40049000 { + portd: pinmux@40049000 { compatible = "openisa,rv32m1-pinmux"; reg = <0x40049000 0xd0>; clocks = <&pcc0 0x124>; }; - pinmux_e: pinmux@41037000 { + porte: pinmux@41037000 { compatible = "openisa,rv32m1-pinmux"; reg = <0x41037000 0xd0>; clocks = <&pcc1 0xdc>; @@ -375,7 +375,7 @@ clocks = <&pcc1 0x3c>; }; - uart0: lpuart@40042000 { + lpuart0: lpuart@40042000 { compatible = "openisa,rv32m1-lpuart"; reg = <0x40042000 0x2c>; clocks = <&pcc0 0x108>; @@ -383,7 +383,7 @@ status = "disabled"; }; - uart1: lpuart@40043000 { + lpuart1: lpuart@40043000 { compatible = "openisa,rv32m1-lpuart"; reg = <0x40043000 0x2c>; clocks = <&pcc0 0x10c>; @@ -391,7 +391,7 @@ status = "disabled"; }; - uart2: lpuart@40044000 { + lpuart2: lpuart@40044000 { compatible = "openisa,rv32m1-lpuart"; reg = <0x40044000 0x2c>; clocks = <&pcc0 0x110>; @@ -399,7 +399,7 @@ status = "disabled"; }; - uart3: lpuart@41036000 { + lpuart3: lpuart@41036000 { compatible = "openisa,rv32m1-lpuart"; reg = <0x41036000 0x2c>; clocks = <&pcc0 0xd8>; @@ -407,7 +407,7 @@ status = "disabled"; }; - i2c0: lpi2c@4003a000 { + lpi2c0: lpi2c@4003a000 { compatible = "openisa,rv32m1-lpi2c"; reg = <0x4003a000 0x170>; clocks = <&pcc0 0xe8>; @@ -418,7 +418,7 @@ status = "disabled"; }; - i2c1: lpi2c@4003b000 { + lpi2c1: lpi2c@4003b000 { compatible = "openisa,rv32m1-lpi2c"; reg = <0x4003b000 0x170>; clocks = <&pcc0 0xec>; @@ -429,7 +429,7 @@ status = "disabled"; }; - i2c2: lpi2c@4003c000 { + lpi2c2: lpi2c@4003c000 { compatible = "openisa,rv32m1-lpi2c"; reg = <0x4003c000 0x170>; clocks = <&pcc0 0xf0>; @@ -440,7 +440,7 @@ status = "disabled"; }; - i2c3: lpi2c@4102e000 { + lpi2c3: lpi2c@4102e000 { compatible = "openisa,rv32m1-lpi2c"; reg = <0x4102e000 0x170>; clocks = <&pcc1 0xb8>; @@ -451,7 +451,7 @@ status = "disabled"; }; - spi0: spi@4003f000 { + lpspi0: spi@4003f000 { compatible = "openisa,rv32m1-lpspi"; reg = <0x4003f000 0x78>; label = "SPI_0"; @@ -461,7 +461,7 @@ #size-cells = <0>; }; - spi1: spi@40040000 { + lpspi1: spi@40040000 { compatible = "openisa,rv32m1-lpspi"; reg = <0x40040000 0x78>; label = "SPI_1"; @@ -471,7 +471,7 @@ #size-cells = <0>; }; - spi2: spi@40041000 { + lpspi2: spi@40041000 { compatible = "openisa,rv32m1-lpspi"; reg = <0x40041000 0x78>; label = "SPI_2"; @@ -481,7 +481,7 @@ #size-cells = <0>; }; - spi3: spi@41035000 { + lpspi3: spi@41035000 { compatible = "openisa,rv32m1-lpspi"; reg = <0x41035000 0x78>; label = "SPI_3"; @@ -498,7 +498,7 @@ #size-cells = <0>; }; - pwm0: pwm@40035000 { + tpm0: pwm@40035000 { compatible = "openisa,rv32m1-tpm"; reg = <0x40035000 0x88>; clocks = <&pcc0 0xd4>; @@ -507,7 +507,7 @@ #pwm-cells = <3>; }; - pwm1: pwm@40036000 { + tpm1: pwm@40036000 { compatible = "openisa,rv32m1-tpm"; reg = <0x40036000 0x88>; clocks = <&pcc0 0xd8>; @@ -516,7 +516,7 @@ #pwm-cells = <3>; }; - pwm2: pwm@40037000 { + tpm2: pwm@40037000 { compatible = "openisa,rv32m1-tpm"; reg = <0x40037000 0x88>; clocks = <&pcc0 0xdc>; @@ -533,7 +533,7 @@ label = "TRNG"; }; - pwm3: pwm@4102d000 { + tpm3: pwm@4102d000 { compatible = "openisa,rv32m1-tpm"; reg = <0x4102d000 0x88>; clocks = <&pcc1 0xb4>; diff --git a/dts/riscv/rv32m1_ri5cy.dtsi b/dts/riscv/rv32m1_ri5cy.dtsi index da4fb399fd9..6b0f1d4490c 100644 --- a/dts/riscv/rv32m1_ri5cy.dtsi +++ b/dts/riscv/rv32m1_ri5cy.dtsi @@ -131,62 +131,62 @@ interrupts = <27>; }; -&uart0 { +&lpuart0 { interrupt-parent = <&event0>; interrupts = <17>; }; -&uart1 { +&lpuart1 { interrupt-parent = <&intmux0_ch1>; interrupts = <13>; }; -&uart2 { +&lpuart2 { interrupt-parent = <&intmux0_ch1>; interrupts = <14>; }; -&uart3 { +&lpuart3 { interrupt-parent = <&intmux0_ch1>; interrupts = <26>; }; -&i2c0 { +&lpi2c0 { interrupt-parent = <&event0>; interrupts = <15>; }; -&i2c1 { +&lpi2c1 { interrupt-parent = <&event0>; interrupts = <16>; }; -&i2c2 { +&lpi2c2 { interrupt-parent = <&intmux0_ch1>; interrupts = <11>; }; -&i2c3 { +&lpi2c3 { interrupt-parent = <&intmux0_ch1>; interrupts = <24>; }; -&spi0 { +&lpspi0 { interrupt-parent = <&event0>; interrupts = <13>; }; -&spi1 { +&lpspi1 { interrupt-parent = <&event0>; interrupts = <14>; }; -&spi2 { +&lpspi2 { interrupt-parent = <&intmux0_ch1>; interrupts = <12>; }; -&spi3 { +&lpspi3 { interrupt-parent = <&intmux0_ch1>; interrupts = <25>; }; @@ -196,22 +196,22 @@ interrupts = <29>; }; -&pwm0 { +&tpm0 { interrupt-parent = <&event0>; interrupts = <19>; }; -&pwm1 { +&tpm1 { interrupt-parent = <&intmux0_ch1>; interrupts = <9>; }; -&pwm2 { +&tpm2 { interrupt-parent = <&intmux0_ch1>; interrupts = <10>; }; -&pwm3 { +&tpm3 { interrupt-parent = <&intmux0_ch1>; interrupts = <23>; }; diff --git a/dts/riscv/rv32m1_zero_riscy.dtsi b/dts/riscv/rv32m1_zero_riscy.dtsi index f4df0634610..e0fcb72cbf0 100644 --- a/dts/riscv/rv32m1_zero_riscy.dtsi +++ b/dts/riscv/rv32m1_zero_riscy.dtsi @@ -130,62 +130,62 @@ interrupts = <21>; }; -&uart0 { +&lpuart0 { interrupt-parent = <&intmux1_ch0>; interrupts = <21>; }; -&uart1 { +&lpuart1 { interrupt-parent = <&intmux1_ch0>; interrupts = <22>; }; -&uart2 { +&lpuart2 { interrupt-parent = <&intmux1_ch0>; interrupts = <23>; }; -&uart3 { +&lpuart3 { interrupt-parent = <&event1>; interrupts = <20>; }; -&i2c0 { +&lpi2c0 { interrupt-parent = <&intmux1_ch0>; interrupts = <13>; }; -&i2c1 { +&lpi2c1 { interrupt-parent = <&intmux1_ch0>; interrupts = <14>; }; -&i2c2 { +&lpi2c2 { interrupt-parent = <&intmux1_ch0>; interrupts = <15>; }; -&i2c3 { +&lpi2c3 { interrupt-parent = <&event1>; interrupts = <16>; }; -&spi0 { +&lpspi0 { interrupt-parent = <&intmux1_ch0>; interrupts = <18>; }; -&spi1 { +&lpspi1 { interrupt-parent = <&intmux1_ch0>; interrupts = <19>; }; -&spi2 { +&lpspi2 { interrupt-parent = <&intmux1_ch0>; interrupts = <20>; }; -&spi3 { +&lpspi3 { interrupt-parent = <&event1>; interrupts = <19>; }; @@ -195,22 +195,22 @@ interrupts = <17>; }; -&pwm0 { +&tpm0 { interrupt-parent = <&intmux1_ch0>; interrupts = <8>; }; -&pwm1 { +&tpm1 { interrupt-parent = <&intmux1_ch0>; interrupts = <9>; }; -&pwm2 { +&tpm2 { interrupt-parent = <&intmux1_ch0>; interrupts = <10>; }; -&pwm3 { +&tpm3 { interrupt-parent = <&event1>; interrupts = <15>; }; diff --git a/soc/riscv/openisa_rv32m1/soc.c b/soc/riscv/openisa_rv32m1/soc.c index f635f409f20..67217e0dc89 100644 --- a/soc/riscv/openisa_rv32m1/soc.c +++ b/soc/riscv/openisa_rv32m1/soc.c @@ -196,16 +196,16 @@ static void rv32m1_switch_to_sirc(void) */ static void rv32m1_setup_peripheral_clocks(void) { -#ifdef DT_OPENISA_RV32M1_TPM_PWM_0_BASE_ADDRESS +#if DT_HAS_NODE(DT_NODELABEL(tpm0)) CLOCK_SetIpSrc(kCLOCK_Tpm0, kCLOCK_IpSrcFircAsync); #endif -#ifdef DT_OPENISA_RV32M1_TPM_PWM_1_BASE_ADDRESS +#if DT_HAS_NODE(DT_NODELABEL(tpm1)) CLOCK_SetIpSrc(kCLOCK_Tpm1, kCLOCK_IpSrcFircAsync); #endif -#ifdef DT_OPENISA_RV32M1_TPM_PWM_2_BASE_ADDRESS +#if DT_HAS_NODE(DT_NODELABEL(tpm2)) CLOCK_SetIpSrc(kCLOCK_Tpm2, kCLOCK_IpSrcFircAsync); #endif -#ifdef DT_OPENISA_RV32M1_TPM_PWM_3_BASE_ADDRESS +#if DT_HAS_NODE(DT_NODELABEL(tpm3)) CLOCK_SetIpSrc(kCLOCK_Tpm3, kCLOCK_IpSrcFircAsync); #endif }