From b25569ef741c967228101143b353f05eae7917fa Mon Sep 17 00:00:00 2001 From: Christian Taedcke Date: Tue, 5 Nov 2019 16:46:34 +0100 Subject: [PATCH] soc: silabs_exx32: Enable mpu on efr32mg soc Enables the arm v7m mpu on the efr32mg soc and the board efr32mg_sltb004a. Tested on hardware with samples/mpu/mpu_test and tests/kernel/mem_protect Signed-off-by: Christian Taedcke --- boards/arm/efr32mg_sltb004a/doc/index.rst | 2 + .../efr32mg_sltb004a_defconfig | 1 + soc/arm/silabs_exx32/common/CMakeLists.txt | 2 + soc/arm/silabs_exx32/common/arm_mpu_mem_cfg.h | 55 +++++++++++++++++++ soc/arm/silabs_exx32/common/arm_mpu_regions.c | 33 +++++++++++ .../silabs_exx32/efr32mg12p/Kconfig.series | 1 + soc/arm/silabs_exx32/efr32mg12p/soc.h | 4 +- 7 files changed, 97 insertions(+), 1 deletion(-) create mode 100644 soc/arm/silabs_exx32/common/arm_mpu_mem_cfg.h create mode 100644 soc/arm/silabs_exx32/common/arm_mpu_regions.c diff --git a/boards/arm/efr32mg_sltb004a/doc/index.rst b/boards/arm/efr32mg_sltb004a/doc/index.rst index 66dc63faba2..b718af979c2 100644 --- a/boards/arm/efr32mg_sltb004a/doc/index.rst +++ b/boards/arm/efr32mg_sltb004a/doc/index.rst @@ -59,6 +59,8 @@ The efr32mg_sltb004a board configuration supports the following hardware feature +-----------+------------+-------------------------------------+ | Interface | Controller | Driver/Component | +===========+============+=====================================+ +| MPU | on-chip | memory protection unit | ++-----------+------------+-------------------------------------+ | NVIC | on-chip | nested vector interrupt controller | +-----------+------------+-------------------------------------+ | SYSTICK | on-chip | systick | diff --git a/boards/arm/efr32mg_sltb004a/efr32mg_sltb004a_defconfig b/boards/arm/efr32mg_sltb004a/efr32mg_sltb004a_defconfig index 4503d467849..3128faf5b28 100644 --- a/boards/arm/efr32mg_sltb004a/efr32mg_sltb004a_defconfig +++ b/boards/arm/efr32mg_sltb004a/efr32mg_sltb004a_defconfig @@ -1,6 +1,7 @@ # SPDX-License-Identifier: Apache-2.0 CONFIG_ARM=y +CONFIG_ARM_MPU=y CONFIG_SOC_FAMILY_EXX32=y CONFIG_SOC_SERIES_EFR32MG12P=y CONFIG_BOARD_EFR32MG_SLTB004A=y diff --git a/soc/arm/silabs_exx32/common/CMakeLists.txt b/soc/arm/silabs_exx32/common/CMakeLists.txt index 0436151c4cb..4faeb491893 100644 --- a/soc/arm/silabs_exx32/common/CMakeLists.txt +++ b/soc/arm/silabs_exx32/common/CMakeLists.txt @@ -3,3 +3,5 @@ zephyr_sources(soc.c soc_gpio.c) zephyr_sources_ifdef(CONFIG_SYS_POWER_MANAGEMENT soc_power.c) + +zephyr_sources_ifdef(CONFIG_ARM_MPU arm_mpu_regions.c) diff --git a/soc/arm/silabs_exx32/common/arm_mpu_mem_cfg.h b/soc/arm/silabs_exx32/common/arm_mpu_mem_cfg.h new file mode 100644 index 00000000000..67d78723716 --- /dev/null +++ b/soc/arm/silabs_exx32/common/arm_mpu_mem_cfg.h @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * Copyright (c) 2019 Christian Taedcke + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef _ARM_MPU_MEM_CFG_H_ +#define _ARM_MPU_MEM_CFG_H_ + +#include +#include + +/* Flash Region Definitions */ +#if CONFIG_FLASH_SIZE == 64 +#define REGION_FLASH_SIZE REGION_64K +#elif CONFIG_FLASH_SIZE == 128 +#define REGION_FLASH_SIZE REGION_128K +#elif CONFIG_FLASH_SIZE == 256 +#define REGION_FLASH_SIZE REGION_256K +#elif CONFIG_FLASH_SIZE == 512 +#define REGION_FLASH_SIZE REGION_512K +#elif CONFIG_FLASH_SIZE == 1024 +#define REGION_FLASH_SIZE REGION_1M +#elif CONFIG_FLASH_SIZE == 2048 +#define REGION_FLASH_SIZE REGION_2M +#else +#error "Unsupported configuration" +#endif + +/* SRAM Region Definitions */ +#if CONFIG_SRAM_SIZE == 16 +#define REGION_SRAM_0_SIZE REGION_16K +#elif CONFIG_SRAM_SIZE == 32 +#define REGION_SRAM_0_SIZE REGION_32K +#elif CONFIG_SRAM_SIZE == 64 +#define REGION_SRAM_0_SIZE REGION_64K +#elif CONFIG_SRAM_SIZE == 128 +#define REGION_SRAM_0_SIZE REGION_128K +#elif CONFIG_SRAM_SIZE == 192 +#define REGION_SRAM_0_SIZE REGION_128K +#define REGION_SRAM_1_START 0x20000 +#define REGION_SRAM_1_SIZE REGION_64K +#elif CONFIG_SRAM_SIZE == 256 +#define REGION_SRAM_0_SIZE REGION_256K +#elif CONFIG_SRAM_SIZE == 384 +#define REGION_SRAM_0_SIZE REGION_256K +#define REGION_SRAM_1_START 0x40000 +#define REGION_SRAM_1_SIZE REGION_128K +#elif CONFIG_SRAM_SIZE == 512 +#define REGION_SRAM_0_SIZE REGION_512K +#else +#error "Unsupported configuration" +#endif + +#endif /* _ARM_MPU_MEM_CFG_H_ */ diff --git a/soc/arm/silabs_exx32/common/arm_mpu_regions.c b/soc/arm/silabs_exx32/common/arm_mpu_regions.c new file mode 100644 index 00000000000..da9d998f396 --- /dev/null +++ b/soc/arm/silabs_exx32/common/arm_mpu_regions.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * Copyright (c) 2019 Christian Taedcke + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +#include "arm_mpu_mem_cfg.h" + +static const struct arm_mpu_region mpu_regions[] = { + /* Region 0 */ + MPU_REGION_ENTRY("FLASH_0", + CONFIG_FLASH_BASE_ADDRESS, + REGION_FLASH_ATTR(REGION_FLASH_SIZE)), + /* Region 1 */ + MPU_REGION_ENTRY("RAM_0", + CONFIG_SRAM_BASE_ADDRESS, + REGION_RAM_ATTR(REGION_SRAM_0_SIZE)), + /* Region 2 */ +#ifdef REGION_SRAM_1_SIZE + MPU_REGION_ENTRY("RAM_1", + (CONFIG_SRAM_BASE_ADDRESS + REGION_SRAM_1_START), + REGION_RAM_ATTR(REGION_SRAM_1_SIZE)), +#endif +}; + +const struct arm_mpu_config mpu_config = { + .num_regions = ARRAY_SIZE(mpu_regions), + .mpu_regions = mpu_regions, +}; diff --git a/soc/arm/silabs_exx32/efr32mg12p/Kconfig.series b/soc/arm/silabs_exx32/efr32mg12p/Kconfig.series index 9cd8a68bf51..9effe8abd79 100644 --- a/soc/arm/silabs_exx32/efr32mg12p/Kconfig.series +++ b/soc/arm/silabs_exx32/efr32mg12p/Kconfig.series @@ -7,6 +7,7 @@ config SOC_SERIES_EFR32MG12P bool "EFR32MG12P Series MCU" select CPU_CORTEX_M4 select CPU_HAS_FPU + select CPU_HAS_ARM_MPU select SOC_FAMILY_EXX32 select HAS_SILABS_GECKO select HAS_SWO diff --git a/soc/arm/silabs_exx32/efr32mg12p/soc.h b/soc/arm/silabs_exx32/efr32mg12p/soc.h index 4bd11b85096..efc0d1a1bb5 100644 --- a/soc/arm/silabs_exx32/efr32mg12p/soc.h +++ b/soc/arm/silabs_exx32/efr32mg12p/soc.h @@ -18,7 +18,9 @@ #ifndef _ASMLANGUAGE #include -#include + +/* Add include for DTS generated information */ +#include #include "soc_pinmap.h" #include "../common/soc_gpio.h"