From b22dd170e6fdbeeeb1511573ac87e4d41a9a758c Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Fri, 4 Feb 2022 11:58:17 +0100 Subject: [PATCH] drivers/clock_control: stm32h7: Add support for CKPER clock mux Add support for CKPER clock mux. Signed-off-by: Erwan Gouriou --- drivers/clock_control/clock_stm32_ll_h7.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/clock_control/clock_stm32_ll_h7.c b/drivers/clock_control/clock_stm32_ll_h7.c index a1652114d05..bd2c72f555a 100644 --- a/drivers/clock_control/clock_stm32_ll_h7.c +++ b/drivers/clock_control/clock_stm32_ll_h7.c @@ -327,6 +327,7 @@ static int enabled_clock(uint32_t src_clk) { if ((src_clk == STM32_SRC_SYSCLK) || + ((src_clk == STM32_SRC_CKPER) && IS_ENABLED(STM32_CKPER_ENABLED)) || ((src_clk == STM32_SRC_HSE) && IS_ENABLED(STM32_HSE_ENABLED)) || ((src_clk == STM32_SRC_HSI_KER) && IS_ENABLED(STM32_HSI_ENABLED)) || ((src_clk == STM32_SRC_CSI_KER) && IS_ENABLED(STM32_CSI_ENABLED)) || @@ -476,6 +477,11 @@ static int stm32_clock_control_get_subsys_rate(const struct device *clock, case STM32_SRC_SYSCLK: *rate = get_hclk_frequency(); break; +#if defined(STM32_CKPER_ENABLED) + case STM32_SRC_CKPER: + *rate = LL_RCC_GetCLKPClockFreq(LL_RCC_CLKP_CLKSOURCE); + break; +#endif /* STM32_CKPER_ENABLED */ #if defined(STM32_HSE_ENABLED) case STM32_SRC_HSE: *rate = STM32_HSE_FREQ;