drivers: ieee802154: rf2xx: use gpio_dt_spec

Simplify the implementation by using gpio_dt_spec.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit is contained in:
Gerard Marull-Paretas 2022-02-01 10:11:11 +01:00 committed by Anas Nashif
commit b15fb9cb2f
3 changed files with 51 additions and 106 deletions

View file

@ -614,12 +614,11 @@ static int rf2xx_tx(const struct device *dev,
static int rf2xx_start(const struct device *dev)
{
const struct rf2xx_config *conf = dev->config;
struct rf2xx_context *ctx = dev->data;
rf2xx_trx_set_state(dev, RF2XX_TRX_PHY_STATE_CMD_TRX_OFF);
rf2xx_iface_reg_read(dev, RF2XX_IRQ_STATUS_REG);
gpio_pin_interrupt_configure(ctx->irq_gpio, conf->irq.pin,
GPIO_INT_EDGE_TO_ACTIVE);
gpio_pin_interrupt_configure_dt(&conf->irq_gpio,
GPIO_INT_EDGE_TO_ACTIVE);
rf2xx_trx_set_rx_state(dev);
return 0;
@ -628,10 +627,8 @@ static int rf2xx_start(const struct device *dev)
static int rf2xx_stop(const struct device *dev)
{
const struct rf2xx_config *conf = dev->config;
struct rf2xx_context *ctx = dev->data;
gpio_pin_interrupt_configure(ctx->irq_gpio, conf->irq.pin,
GPIO_INT_DISABLE);
gpio_pin_interrupt_configure_dt(&conf->irq_gpio, GPIO_INT_DISABLE);
rf2xx_trx_set_state(dev, RF2XX_TRX_PHY_STATE_CMD_TRX_OFF);
rf2xx_iface_reg_read(dev, RF2XX_IRQ_STATUS_REG);
@ -773,8 +770,8 @@ static int power_on_and_setup(const struct device *dev)
(1 << RF2XX_TRX_END);
rf2xx_iface_reg_write(dev, RF2XX_IRQ_MASK_REG, config);
gpio_init_callback(&ctx->irq_cb, trx_isr_handler, BIT(conf->irq.pin));
gpio_add_callback(ctx->irq_gpio, &ctx->irq_cb);
gpio_init_callback(&ctx->irq_cb, trx_isr_handler, BIT(conf->irq_gpio.pin));
gpio_add_callback(conf->irq_gpio.port, &ctx->irq_cb);
return 0;
}
@ -782,58 +779,52 @@ static int power_on_and_setup(const struct device *dev)
static inline int configure_gpios(const struct device *dev)
{
const struct rf2xx_config *conf = dev->config;
struct rf2xx_context *ctx = dev->data;
/* Chip IRQ line */
ctx->irq_gpio = device_get_binding(conf->irq.devname);
if (ctx->irq_gpio == NULL) {
LOG_ERR("Failed to get instance of %s device",
conf->irq.devname);
return -EINVAL;
if (!device_is_ready(conf->irq_gpio.port)) {
LOG_ERR("IRQ GPIO device not ready");
return -ENODEV;
}
gpio_pin_configure(ctx->irq_gpio, conf->irq.pin, conf->irq.flags |
GPIO_INPUT);
gpio_pin_interrupt_configure(ctx->irq_gpio, conf->irq.pin,
GPIO_INT_EDGE_TO_ACTIVE);
gpio_pin_configure_dt(&conf->irq_gpio, GPIO_INPUT);
gpio_pin_interrupt_configure_dt(&conf->irq_gpio,
GPIO_INT_EDGE_TO_ACTIVE);
/* Chip RESET line */
ctx->reset_gpio = device_get_binding(conf->reset.devname);
if (ctx->reset_gpio == NULL) {
LOG_ERR("Failed to get instance of %s device",
conf->reset.devname);
return -EINVAL;
if (!device_is_ready(conf->reset_gpio.port)) {
LOG_ERR("RESET GPIO device not ready");
return -ENODEV;
}
gpio_pin_configure(ctx->reset_gpio, conf->reset.pin, conf->reset.flags |
GPIO_OUTPUT_INACTIVE);
gpio_pin_configure_dt(&conf->reset_gpio, GPIO_OUTPUT_INACTIVE);
/* Chip SLPTR line */
ctx->slptr_gpio = device_get_binding(conf->slptr.devname);
if (ctx->slptr_gpio == NULL) {
LOG_ERR("Failed to get instance of %s device",
conf->slptr.devname);
return -EINVAL;
if (!device_is_ready(conf->slptr_gpio.port)) {
LOG_ERR("SLPTR GPIO device not ready");
return -ENODEV;
}
gpio_pin_configure(ctx->slptr_gpio, conf->slptr.pin, conf->slptr.flags |
GPIO_OUTPUT_INACTIVE);
gpio_pin_configure_dt(&conf->slptr_gpio, GPIO_OUTPUT_INACTIVE);
/* Chip DIG2 line (Optional feature) */
ctx->dig2_gpio = device_get_binding(conf->dig2.devname);
if (ctx->dig2_gpio != NULL) {
if (conf->dig2_gpio.port != NULL) {
if (!device_is_ready(conf->dig2_gpio.port)) {
LOG_ERR("DIG2 GPIO device not ready");
return -ENODEV;
}
LOG_INF("Optional instance of %s device activated",
conf->dig2.devname);
gpio_pin_configure(ctx->dig2_gpio, conf->dig2.pin,
conf->dig2.flags | GPIO_INPUT);
gpio_pin_interrupt_configure(ctx->dig2_gpio, conf->dig2.pin,
GPIO_INT_EDGE_TO_ACTIVE);
conf->dig2_gpio.port->name);
gpio_pin_configure_dt(&conf->dig2_gpio, GPIO_INPUT);
gpio_pin_interrupt_configure_dt(&conf->dig2_gpio,
GPIO_INT_EDGE_TO_ACTIVE);
}
/* Chip CLKM line (Optional feature) */
ctx->clkm_gpio = device_get_binding(conf->clkm.devname);
if (ctx->clkm_gpio != NULL) {
if (conf->clkm_gpio.port != NULL) {
if (!device_is_ready(conf->clkm_gpio.port)) {
LOG_ERR("CLKM GPIO device not ready");
return -ENODEV;
}
LOG_INF("Optional instance of %s device activated",
conf->clkm.devname);
gpio_pin_configure(ctx->clkm_gpio, conf->clkm.pin,
conf->clkm.flags | GPIO_INPUT);
conf->clkm_gpio.port->name);
gpio_pin_configure_dt(&conf->clkm_gpio, GPIO_INPUT);
}
return 0;
@ -935,22 +926,6 @@ static struct ieee802154_radio_api rf2xx_radio_api = {
#endif
#endif /* CONFIG_IEEE802154_RAW_MODE */
/*
* Optional features place holders, get a 0 if the "gpio" doesn't exist
*/
#define DRV_INST_GPIO_LABEL(n, gpio_pha) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, gpio_pha), \
DT_INST_GPIO_LABEL(n, gpio_pha))
#define DRV_INST_GPIO_PIN(n, gpio_pha) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, gpio_pha), \
DT_INST_GPIO_PIN(n, gpio_pha))
#define DRV_INST_GPIO_FLAGS(n, gpio_pha) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, gpio_pha), \
DT_INST_GPIO_FLAGS(n, gpio_pha))
#define DRV_INST_LOCAL_MAC_ADDRESS(n) \
UTIL_AND(DT_INST_NODE_HAS_PROP(n, local_mac_address), \
UTIL_AND(DT_INST_PROP_LEN(n, local_mac_address) == 8, \
@ -960,27 +935,11 @@ static struct ieee802154_radio_api rf2xx_radio_api = {
static const struct rf2xx_config rf2xx_ctx_config_##n = { \
.inst = n, \
.has_mac = DT_INST_NODE_HAS_PROP(n, local_mac_address), \
\
.irq.devname = DRV_INST_GPIO_LABEL(n, irq_gpios), \
.irq.pin = DRV_INST_GPIO_PIN(n, irq_gpios), \
.irq.flags = DRV_INST_GPIO_FLAGS(n, irq_gpios), \
\
.reset.devname = DRV_INST_GPIO_LABEL(n, reset_gpios), \
.reset.pin = DRV_INST_GPIO_PIN(n, reset_gpios), \
.reset.flags = DRV_INST_GPIO_FLAGS(n, reset_gpios), \
\
.slptr.devname = DRV_INST_GPIO_LABEL(n, slptr_gpios), \
.slptr.pin = DRV_INST_GPIO_PIN(n, slptr_gpios), \
.slptr.flags = DRV_INST_GPIO_FLAGS(n, slptr_gpios), \
\
.dig2.devname = DRV_INST_GPIO_LABEL(n, dig2_gpios), \
.dig2.pin = DRV_INST_GPIO_PIN(n, dig2_gpios), \
.dig2.flags = DRV_INST_GPIO_FLAGS(n, dig2_gpios), \
\
.clkm.devname = DRV_INST_GPIO_LABEL(n, clkm_gpios), \
.clkm.pin = DRV_INST_GPIO_PIN(n, clkm_gpios), \
.clkm.flags = DRV_INST_GPIO_FLAGS(n, clkm_gpios), \
\
.irq_gpio = GPIO_DT_SPEC_INST_GET(n, irq_gpios), \
.reset_gpio = GPIO_DT_SPEC_INST_GET(n, reset_gpios), \
.slptr_gpio = GPIO_DT_SPEC_INST_GET(n, slptr_gpios), \
.dig2_gpio = GPIO_DT_SPEC_INST_GET_OR(n, dig2_gpios, {}), \
.clkm_gpio = GPIO_DT_SPEC_INST_GET_OR(n, clkm_gpios, {}), \
.spi = SPI_DT_SPEC_INST_GET(n, SPI_WORD_SET(8) | \
SPI_TRANSFER_MSB, 0), \
}

View file

@ -74,18 +74,12 @@ enum rf2xx_trx_model_t {
RF2XX_TRX_MODEL_233 = 0x0B,
};
struct rf2xx_dt_gpio_t {
const char *devname;
uint32_t pin;
uint32_t flags;
};
struct rf2xx_config {
struct rf2xx_dt_gpio_t irq;
struct rf2xx_dt_gpio_t reset;
struct rf2xx_dt_gpio_t slptr;
struct rf2xx_dt_gpio_t dig2;
struct rf2xx_dt_gpio_t clkm;
struct gpio_dt_spec irq_gpio;
struct gpio_dt_spec reset_gpio;
struct gpio_dt_spec slptr_gpio;
struct gpio_dt_spec dig2_gpio;
struct gpio_dt_spec clkm_gpio;
struct spi_dt_spec spi;
@ -98,12 +92,6 @@ struct rf2xx_context {
const struct device *dev;
const struct device *irq_gpio;
const struct device *reset_gpio;
const struct device *slptr_gpio;
const struct device *dig2_gpio;
const struct device *clkm_gpio;
struct gpio_callback irq_cb;
struct k_thread trx_thread;

View file

@ -27,30 +27,28 @@ LOG_MODULE_REGISTER(LOG_MODULE_NAME);
void rf2xx_iface_phy_rst(const struct device *dev)
{
const struct rf2xx_config *conf = dev->config;
const struct rf2xx_context *ctx = dev->data;
/* Ensure control lines have correct levels. */
gpio_pin_set(ctx->reset_gpio, conf->reset.pin, 0);
gpio_pin_set(ctx->slptr_gpio, conf->slptr.pin, 0);
gpio_pin_set_dt(&conf->reset_gpio, 0);
gpio_pin_set_dt(&conf->slptr_gpio, 0);
/* Wait typical time of timer TR1. */
k_busy_wait(330);
gpio_pin_set(ctx->reset_gpio, conf->reset.pin, 1);
gpio_pin_set_dt(&conf->reset_gpio, 1);
k_busy_wait(10);
gpio_pin_set(ctx->reset_gpio, conf->reset.pin, 0);
gpio_pin_set_dt(&conf->reset_gpio, 0);
}
void rf2xx_iface_phy_tx_start(const struct device *dev)
{
const struct rf2xx_config *conf = dev->config;
const struct rf2xx_context *ctx = dev->data;
/* Start TX transmission at rise edge */
gpio_pin_set(ctx->slptr_gpio, conf->slptr.pin, 1);
gpio_pin_set_dt(&conf->slptr_gpio, 1);
/* 16.125[μs] delay to detect signal */
k_busy_wait(20);
/* restore initial pin state */
gpio_pin_set(ctx->slptr_gpio, conf->slptr.pin, 0);
gpio_pin_set_dt(&conf->slptr_gpio, 0);
}
uint8_t rf2xx_iface_reg_read(const struct device *dev,