diff --git a/arch/riscv/core/pmp/core_pmp.c b/arch/riscv/core/pmp/core_pmp.c
index b2dfc58d9db..b93598d0401 100644
--- a/arch/riscv/core/pmp/core_pmp.c
+++ b/arch/riscv/core/pmp/core_pmp.c
@@ -31,10 +31,32 @@ LOG_MODULE_REGISTER(mpu);
 
 #if defined(CONFIG_PMP_POWER_OF_TWO_ALIGNMENT)
 # define PMP_MODE_DEFAULT		PMP_MODE_NAPOT
+# define PMP_USED_ENTRY_DEFAULT		1 /* NAPOT region use 1 PMP entry */
 #else
 # define PMP_MODE_DEFAULT		PMP_MODE_TOR
+# define PMP_USED_ENTRY_DEFAULT		2 /* TOR region use 2 PMP entry */
 #endif
 
+#ifdef CONFIG_USERSPACE
+/*
+ * Define the used PMP regions before memory domain/partition.
+ *
+ * Already used PMP regions:
+ *   1. 0/1 entry for interrupt stack guard: None
+ *   2. 1   entry for MCU state: R
+ *   3. 1/2 entry for program and read only data: RX
+ *   4. 1/2 entry for user thread stack: RW
+ */
+#define PMP_REGION_NUM_FOR_U_THREAD	( \
+	(IS_ENABLED(CONFIG_PMP_STACK_GUARD) ? 1 : 0) + \
+	 1 + (2 * PMP_USED_ENTRY_DEFAULT))
+
+#define PMP_MAX_DYNAMIC_REGION		( \
+	(CONFIG_PMP_SLOT - PMP_REGION_NUM_FOR_U_THREAD) \
+	/ PMP_USED_ENTRY_DEFAULT)
+
+#endif /* CONFIG_USERSPACE */
+
 enum pmp_region_mode {
 	PMP_MODE_NA4,
 	/* If NAPOT mode region size is 4, apply NA4 region to PMP CSR. */
diff --git a/include/arch/riscv/thread.h b/include/arch/riscv/thread.h
index 3b760671240..09693ef52af 100644
--- a/include/arch/riscv/thread.h
+++ b/include/arch/riscv/thread.h
@@ -50,51 +50,6 @@
 #define PMP_CFG_CSR_NUM_FOR_STACK_GUARD	2
 #endif /* CONFIG_PMP_STACK_GUARD */
 
-#ifdef CONFIG_PMP_POWER_OF_TWO_ALIGNMENT
-#ifdef CONFIG_USERSPACE
-#ifdef CONFIG_PMP_STACK_GUARD
-/*
- * 1 for interrupt stack guard: None
- * 1 for core state: R
- * 1 for program and read only data: RX
- * 1 for user thread stack: RW
- */
-#define PMP_REGION_NUM_FOR_U_THREAD	4
-#else /* CONFIG_PMP_STACK_GUARD */
-/*
- * 1 for core state: R
- * 1 for program and read only data: RX
- * 1 for user thread stack: RW
- */
-#define PMP_REGION_NUM_FOR_U_THREAD	3
-#endif /* CONFIG_PMP_STACK_GUARD */
-#define PMP_MAX_DYNAMIC_REGION	(CONFIG_PMP_SLOT - PMP_REGION_NUM_FOR_U_THREAD)
-#endif /* CONFIG_USERSPACE */
-
-#else /* CONFIG_PMP_POWER_OF_TWO_ALIGNMENT */
-
-#ifdef CONFIG_USERSPACE
-#ifdef CONFIG_PMP_STACK_GUARD
-/*
- * 1 for interrupt stack guard: None
- * 1 for core state: R
- * 2 for program and read only data: RX
- * 2 for user thread stack: RW
- */
-#define PMP_REGION_NUM_FOR_U_THREAD	6
-#else /* CONFIG_PMP_STACK_GUARD */
-/*
- * 1 for core state: R
- * 2 for program and read only data: RX
- * 2 for user thread stack: RW
- */
-#define PMP_REGION_NUM_FOR_U_THREAD	5
-#endif /* CONFIG_PMP_STACK_GUARD */
-#define PMP_MAX_DYNAMIC_REGION	((CONFIG_PMP_SLOT - \
-				PMP_REGION_NUM_FOR_U_THREAD) >> 1)
-#endif /* CONFIG_USERSPACE */
-#endif /* CONFIG_PMP_POWER_OF_TWO_ALIGNMENT */
-
 /*
  * The following structure defines the list of registers that need to be
  * saved/restored when a cooperative context switch occurs.