From b0de827661812e67bca3f51ee83418c3b5144539 Mon Sep 17 00:00:00 2001 From: Rahul Gurram Date: Tue, 13 May 2025 16:59:12 +0200 Subject: [PATCH] modules: hal_silabs: Imported SDK files Imported mem pool quota files from the SDK driver Adding mempool quota files significantly improved the performance of the SDK driver.While the basic buffer pool caused issues during long running UDP data transfers,the mempool quota demonstrated stable and reliable performance. Signed-off-by: Rahul Gurram --- modules/hal_silabs/wiseconnect/CMakeLists.txt | 4 +++- west.yml | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/modules/hal_silabs/wiseconnect/CMakeLists.txt b/modules/hal_silabs/wiseconnect/CMakeLists.txt index 6ecadd1729a..25a1b218798 100644 --- a/modules/hal_silabs/wiseconnect/CMakeLists.txt +++ b/modules/hal_silabs/wiseconnect/CMakeLists.txt @@ -22,6 +22,7 @@ zephyr_compile_definitions( zephyr_include_directories( ${SISDK_DIR}/platform/common/inc ${SISDK_DIR}/platform/common/config + ${SISDK_DIR}/platform/service/mem_pool/inc ${WISECONNECT_DIR}/components/board/silabs/inc ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/config ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/chip/inc @@ -40,6 +41,7 @@ zephyr_include_directories( zephyr_library_sources( ${SISDK_DIR}/platform/common/src/sl_core_cortexm.c + ${SISDK_DIR}/platform/service/mem_pool/src/sl_mem_pool.c ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/chip/src/rsi_deepsleep_soc.c ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/core/chip/src/system_si91x.c ${WISECONNECT_DIR}/components/device/silabs/si91x/mcu/drivers/peripheral_drivers/src/clock_update.c @@ -155,7 +157,7 @@ if(CONFIG_WISECONNECT_NETWORK_STACK) ${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/ahb_interface/src/sl_platform_wireless.c ${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/ahb_interface/src/sl_si91x_bus.c ${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/host_mcu/si91x/siwx917_soc_ncp_host.c - ${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/memory/malloc_buffers.c + ${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/memory/mem_pool_buffer_quota.c ${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/src/sl_rsi_utility.c ${WISECONNECT_DIR}/components/device/silabs/si91x/wireless/src/sl_si91x_driver.c ${WISECONNECT_DIR}/components/protocol/wifi/si91x/sl_wifi.c diff --git a/west.yml b/west.yml index ba840341307..e59a2a3c22d 100644 --- a/west.yml +++ b/west.yml @@ -235,7 +235,7 @@ manifest: groups: - hal - name: hal_silabs - revision: a0095a7ac356a04e12188bb563e6207594f8e6b2 + revision: 411072b67f564eb6ebceadbf9ffb1bb1ccdc7e73 path: modules/hal/silabs groups: - hal