michaelh/zephyr
1
0
Fork 0
Code Releases Activity

boards: mimxrt1024_evk: Add ADC support to RT1024

Browse source 
Adds ADC support to RT1024 EVK. ADC channels 10 and 11 are enabled as
pins 2 and 4 on J18 of the evaluation board

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2021-10-11 15:49:59 -05:00 • committed by Carles Cufí
commit b0d613d9ba
6 changed files with 41 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

6
boards/arm/mimxrt1024_evk/doc/index.rst
View file

@ -97,6 +97,8 @@ features:
+-----------+------------+-------------------------------------+
| DMA | on-chip | dma |
+-----------+------------+-------------------------------------+
| ADC | on-chip | adc |
+-----------+------------+-------------------------------------+
The default configuration can be found in the defconfig file:
``boards/arm/mimxrt1024_evk/mimxrt1024_evk_defconfig``
@ -151,6 +153,10 @@ The MIMXRT1024 SoC has five pairs of pinmux/gpio controllers.
+---------------+-----------------+---------------------------+
| GPIO_SD_B1_03 | LPI2C4_SDA | I2C SDA |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_11 | ADC1 | ADC1 Channel 11 |
+---------------+-----------------+---------------------------+
| GPIO_AD_B1_10 | ADC1 | ADC1 Channel 10 |
+---------------+-----------------+---------------------------+
System Clock
============

4
boards/arm/mimxrt1024_evk/mimxrt1024_evk.dts
View file

@ -120,3 +120,7 @@
&lpspi1 {
status = "okay";
};
&adc1 {
status = "okay";
};

1
boards/arm/mimxrt1024_evk/mimxrt1024_evk.yaml
View file

@ -21,3 +21,4 @@ supported:
- netif:eth
- watchdog
- spi
- adc

16
boards/arm/mimxrt1024_evk/pinmux.c
View file

@ -147,6 +147,22 @@ static int mimxrt1024_evk_init(const struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif
#endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(adc1), okay) && CONFIG_ADC
/* ADC1 Channel 10 and 11 are on pins 2 and 4 of J18 */
/* ADC1 Channel 10 */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26, 0U);
/* ADC1 Channel 11 */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27, 0U);
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_10_GPIO1_IO26,
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_11_GPIO1_IO27,
IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif
return 0;

12
samples/drivers/adc/boards/mimxrt1024_evk.overlay Normal file
View file

@ -0,0 +1,12 @@
/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2021 NXP
*/
/ {
zephyr,user {
/* adjust channel number according to pinmux in board.dts */
io-channels = <&adc1 10>;
};
};

3
tests/drivers/adc/adc_api/src/test_adc.c
View file

@ -298,7 +298,8 @@
#elif defined(CONFIG_BOARD_MIMXRT1050_EVK) || \
defined(CONFIG_BOARD_MIMXRT1050_EVK_QSPI) || \
defined(CONFIG_BOARD_MIMXRT1064_EVK) || \
defined(CONFIG_BOARD_MIMXRT1060_EVK)
defined(CONFIG_BOARD_MIMXRT1060_EVK) || \
defined(CONFIG_BOARD_MIMXRT1024_EVK)
#define ADC_DEVICE_NAME DT_LABEL(DT_INST(0, nxp_mcux_12b1msps_sar))
#define ADC_RESOLUTION 12
#define ADC_GAIN ADC_GAIN_1