diff --git a/boards/arm/nucleo_f767zi/CMakeLists.txt b/boards/arm/nucleo_f767zi/CMakeLists.txt new file mode 100644 index 00000000000..d1b8108cfed --- /dev/null +++ b/boards/arm/nucleo_f767zi/CMakeLists.txt @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +if(CONFIG_PINMUX) +zephyr_library() +zephyr_library_sources(pinmux.c) +zephyr_library_include_directories(${ZEPHYR_BASE}/drivers) +endif() diff --git a/boards/arm/nucleo_f767zi/Kconfig.board b/boards/arm/nucleo_f767zi/Kconfig.board new file mode 100644 index 00000000000..d76625a7e59 --- /dev/null +++ b/boards/arm/nucleo_f767zi/Kconfig.board @@ -0,0 +1,8 @@ +# STM32F767ZI Nucleo board configuration + +# Copyright (c) 2019 Roland Ma +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_F767ZI + bool "Nucleo F767ZI Development Board" + depends on SOC_STM32F767XX diff --git a/boards/arm/nucleo_f767zi/Kconfig.defconfig b/boards/arm/nucleo_f767zi/Kconfig.defconfig new file mode 100644 index 00000000000..e57fbee9f39 --- /dev/null +++ b/boards/arm/nucleo_f767zi/Kconfig.defconfig @@ -0,0 +1,63 @@ +# STM32F767ZI Nucleo board configuration + +# Copyright (c) 2019 Roland Ma +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_NUCLEO_F767ZI + +config BOARD + default "nucleo_f767zi" + +if UART_CONSOLE + +config UART_3 + default y + +endif # UART_CONSOLE + +if SERIAL + +config UART_6 + default y + +endif # SERIAL + +if NETWORKING + +config NET_L2_ETHERNET + default y + +config ETH_STM32_HAL + default y + +endif # NETWORKING + +if I2C + +config I2C_1 + default y + +endif # I2C + +if PWM + +config PWM_STM32_1 + default y + +endif # PWM + +if SPI + +config SPI_1 + default y + +endif # SPI + +if CAN + +config CAN_1 + default y + +endif # CAN + +endif # BOARD_NUCLEO_F767ZI diff --git a/boards/arm/nucleo_f767zi/arduino_r3_connector.dtsi b/boards/arm/nucleo_f767zi/arduino_r3_connector.dtsi new file mode 100644 index 00000000000..43a03a7ab80 --- /dev/null +++ b/boards/arm/nucleo_f767zi/arduino_r3_connector.dtsi @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2019 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/ { + arduino_header: connector { + compatible = "arduino-header-r3"; + #gpio-cells = <2>; + gpio-map-mask = <0xffffffff 0xffffffc0>; + gpio-map-pass-thru = <0 0x3f>; + gpio-map = <0 0 &gpioa 3 0>, /* A0 */ + <1 0 &gpioc 0 0>, /* A1 */ + <2 0 &gpioc 3 0>, /* A2 */ + <3 0 &gpiof 3 0>, /* A3 */ + <4 0 &gpiof 5 0>, /* A4 */ + <5 0 &gpiof 10 0>, /* A5 */ + <6 0 &gpiog 9 0>, /* D0 */ + <7 0 &gpiog 14 0>, /* D1 */ + <8 0 &gpiof 15 0>, /* D2 */ + <9 0 &gpioe 13 0>, /* D3 */ + <10 0 &gpiof 14 0>, /* D4 */ + <11 0 &gpioe 11 0>, /* D5 */ + <12 0 &gpioe 9 0>, /* D6 */ + <13 0 &gpiof 13 0>, /* D7 */ + <14 0 &gpiof 12 0>, /* D8 */ + <15 0 &gpiod 15 0>, /* D9 */ + <16 0 &gpiod 14 0>, /* D10 */ + <17 0 &gpioa 7 0>, /* D11 */ + <18 0 &gpioa 6 0>, /* D12 */ + <19 0 &gpioa 5 0>, /* D13 */ + <20 0 &gpiob 9 0>, /* D14 */ + <21 0 &gpiob 8 0>; /* D15 */ + }; +}; + +arduino_serial: &usart6 {}; +arduino_i2c: &i2c1 {}; +arduino_spi: &spi1 {}; diff --git a/boards/arm/nucleo_f767zi/board.cmake b/boards/arm/nucleo_f767zi/board.cmake new file mode 100644 index 00000000000..796c2a4f35a --- /dev/null +++ b/boards/arm/nucleo_f767zi/board.cmake @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(jlink "--device=STM32F767ZI" "--speed=4000") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) diff --git a/boards/arm/nucleo_f767zi/doc/img/nucleo_f767zi.jpg b/boards/arm/nucleo_f767zi/doc/img/nucleo_f767zi.jpg new file mode 100644 index 00000000000..5f2f9b3e72d Binary files /dev/null and b/boards/arm/nucleo_f767zi/doc/img/nucleo_f767zi.jpg differ diff --git a/boards/arm/nucleo_f767zi/doc/index.rst b/boards/arm/nucleo_f767zi/doc/index.rst new file mode 100644 index 00000000000..214013886f8 --- /dev/null +++ b/boards/arm/nucleo_f767zi/doc/index.rst @@ -0,0 +1,227 @@ +.. _nucleo_f767zi_board: + +ST Nucleo F767ZI +################ + +Overview +******** + +The STM32 Nucleo-144 F767ZI boards offer combinations of performance and +power that provide an affordable and flexible way for users to build +prototypes and try out new concepts. For compatible boards, the SMPS +significantly reduces power consumption in Run mode. + +The Arduino-compatible ST Zio connector expands functionality of the Nucleo +open development platform, with a wide choice of specialized Arduino* Uno V3 +shields. + +The STM32 Nucleo-144 board does not require any separate probe as it integrates +the ST-LINK/V2-1 debugger/programmer. + +The STM32 Nucleo-144 board comes with the STM32 comprehensive free software +libraries and examples available with the STM32Cube MCU Package. + +Key Features + +- STM32 microcontroller in LQFP144 package +- Ethernet compliant with IEEE-802.3-2002 (depending on STM32 support) +- USB OTG or full-speed device (depending on STM32 support) +- 3 user LEDs +- 2 user and reset push-buttons +- 32.768 kHz crystal oscillator +- Board connectors: + + - USB with Micro-AB + - SWD + - Ethernet RJ45 (depending on STM32 support) + - ST Zio connector including Arduino* Uno V3 + - ST morpho + +- Flexible power-supply options: ST-LINK USB VBUS or external sources. +- On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration +- capability: mass storage, virtual COM port and debug port. +- Comprehensive free software libraries and examples available with the + STM32Cube MCU package. +- Arm* Mbed Enabled* compliant (only for some Nucleo part numbers) + +.. image:: img/nucleo_f767zi.jpg + :width: 720px + :align: center + :height: 720px + :alt: Nucleo F767ZI + +More information about the board can be found at the `Nucleo F767ZI website`_. + +Hardware +******** + +Nucleo F767ZI provides the following hardware components: + +- STM32F767ZI in LQFP144 package +- ARM 32-bit Cortex-M7 CPU with FPU +- Chrom-ART Accelerator +- ART Accelerator +- 216 MHz max CPU frequency +- VDD from 1.7 V to 3.6 V +- 2 MB Flash +- 512 KB SRAM +- 16-bit timers(10) +- 32-bit timers(2) +- SPI(6) +- I2C(4) +- I2S (3) +- USART(4) +- UART(4) +- USB OTG Full Speed and High Speed(1) +- USB OTG Full Speed(1) +- CAN(2) +- SAI(2) +- SPDIF_Rx(4) +- HDMI_CEC(1) +- Dual Mode Quad SPI(1) +- Camera Interface +- GPIO(up to 168) with external interrupt capability +- 12-bit ADC(3) with 24 channels / 2.4 MSPS +- 12-bit DAC with 2 channels(2) +- True Random Number Generator (RNG) +- 16-channel DMA +- LCD-TFT Controller with XGA resolution + +Supported Features +================== + +The Zephyr nucleo_f767zi board configuration supports the following hardware +features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| ETHERNET | on-chip | ethernet | ++-----------+------------+-------------------------------------+ +| USB | on-chip | usb_device | ++-----------+------------+-------------------------------------+ +| COUNTER | on-chip | rtc | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| SPI | on-chip | spi | ++-----------+------------+-------------------------------------+ +| WATCHDOG | on-chip | independent watchdog | ++-----------+------------+-------------------------------------+ +| ADC | on-chip | ADC Controller | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig file: +``boards/arm/nucleo_f767zi/nucleo_f767zi_defconfig`` + +For mode details please refer to `STM32 Nucleo-144 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +The Nucleo F767ZI board features a ST Zio connector (extended Arduino Uno V3) +and a ST morpho connector. Board is configured as follows: + +- UART_2 TX/RX/RTS/CTS : PD5/PD6/PD4/PD3 +- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com) +- UART_6 TX/RX : PG14/PG9 (Arduino UART) +- USER_PB : PC13 +- LD1 : PB0 +- LD2 : PB7 +- LD3 : PB14 +- ETH : PA1, PA2, PA7, PB13, PC1, PC4, PC5, PG11, PG13 +- USB DM : PA11 +- USB DP : PA12 +- I2C : PB8, PB9 +- PWM : PE13 +- SPI : PA4, PA5, PA6, PA7 + +.. note:: + The Arduino Uno v3 specified SPI device conflicts with the on-board ETH + device on pin PA7. + +System Clock +------------ + +Nucleo F767ZI System Clock could be driven by an internal or external +oscillator, as well as the main PLL clock. By default, the System clock is +driven by the PLL clock at 72MHz, driven by an 8MHz high-speed external clock. + +Serial Port +----------- + +Nucleo F767ZI board has 4 UARTs and 4 USARTs. The Zephyr console output is +assigned to UART3. Default settings are 115200 8N1. + + +Programming and Debugging +************************* + +Applications for the ``nucleo_f767zi`` board configuration can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +Nucleo F767ZI board includes an ST-LINK/V2-1 embedded debug tool interface. + +Flashing an application to Nucleo F767ZI +---------------------------------------- + +Here is an example for the :ref:`hello_world` application. + +Run a serial host program to connect with your Nucleo board. + +.. code-block:: console + + $ minicom -b 115200 -D /dev/ttyACM0 + +Build and flash the application: + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_f767zi + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + $ Hello World! nucleo_f767zi + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:ref:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_f767zi + :maybe-skip-config: + :goals: debug + +.. _Nucleo f767zi website: + https://www.st.com/en/evaluation-tools/nucleo-f767zi.html + +.. _STM32 Nucleo-144 board User Manual: + http://www.st.com/resource/en/user_manual/dm00244518.pdf + +.. _STM32f767zi on www.st.com: + https://www.st.com/content/st_com/en/products/microcontrollers/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32f7-series/stm32f7x&/stm32f767zi.html + +.. _STM32F767 reference manual: + https://www.st.com/resource/en/reference_manual/DM00224583.pdf diff --git a/boards/arm/nucleo_f767zi/nucleo_f767zi_defconfig b/boards/arm/nucleo_f767zi/nucleo_f767zi_defconfig new file mode 100644 index 00000000000..49d48794296 --- /dev/null +++ b/boards/arm/nucleo_f767zi/nucleo_f767zi_defconfig @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_ARM=y +CONFIG_BOARD_NUCLEO_F767ZI=y +CONFIG_SOC_SERIES_STM32F7X=y +CONFIG_SOC_STM32F767XX=y +# 72MHz system clock (CubeMX Defaults) +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable UART +CONFIG_SERIAL=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable Pinmux +CONFIG_PINMUX=y + +# Enable GPIO +CONFIG_GPIO=y + +# Clock Configuration +CONFIG_CLOCK_CONTROL=y + +# STLINK provides 8MHz clock input +CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 +CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y +# Use HSE as PLL input +CONFIG_CLOCK_STM32_PLL_SRC_HSE=y +# Nucleo-144 boards do not have an external oscillator, so just use +# the 8MHz clock signal coming from integrated STLink +CONFIG_CLOCK_STM32_HSE_BYPASS=y + +# Produce 72MHz clock at PLL output +CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4 +CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=72 +CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2 +CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=3 +CONFIG_CLOCK_STM32_AHB_PRESCALER=1 +CONFIG_CLOCK_STM32_APB1_PRESCALER=2 +CONFIG_CLOCK_STM32_APB2_PRESCALER=1 diff --git a/boards/arm/nucleo_f767zi/pinmux.c b/boards/arm/nucleo_f767zi/pinmux.c new file mode 100644 index 00000000000..6492daac350 --- /dev/null +++ b/boards/arm/nucleo_f767zi/pinmux.c @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2019 Roland Ma + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include + +#include + +/* NUCLEO-F767ZI pin configurations + * + * WARNING: The pin PA7 will conflict on selection of SPI_1 and ETH_STM32_HAL. + * If you require both peripherals, and you do not need Arduino Uno v3 + * comaptability, the pin PB5 (also on ST Zio connector) can be used + * for the SPI_1 MOSI signal. + */ +static const struct pin_config pinconf[] = { +#ifdef CONFIG_UART_2 + { STM32_PIN_PD5, STM32F7_PINMUX_FUNC_PD5_USART2_TX }, + { STM32_PIN_PD6, STM32F7_PINMUX_FUNC_PD6_USART2_RX }, + { STM32_PIN_PD4, STM32F7_PINMUX_FUNC_PD4_USART2_RTS }, + { STM32_PIN_PD3, STM32F7_PINMUX_FUNC_PD3_USART2_CTS }, +#endif +#ifdef CONFIG_UART_3 + { STM32_PIN_PD8, STM32F7_PINMUX_FUNC_PD8_USART3_TX }, + { STM32_PIN_PD9, STM32F7_PINMUX_FUNC_PD9_USART3_RX }, +#endif +#ifdef CONFIG_UART_6 + { STM32_PIN_PG14, STM32F7_PINMUX_FUNC_PG14_USART6_TX }, + { STM32_PIN_PG9, STM32F7_PINMUX_FUNC_PG9_USART6_RX }, +#endif +#ifdef CONFIG_ETH_STM32_HAL + { STM32_PIN_PC1, STM32F7_PINMUX_FUNC_PC1_ETH }, + { STM32_PIN_PC4, STM32F7_PINMUX_FUNC_PC4_ETH }, + { STM32_PIN_PC5, STM32F7_PINMUX_FUNC_PC5_ETH }, + { STM32_PIN_PA1, STM32F7_PINMUX_FUNC_PA1_ETH }, + { STM32_PIN_PA2, STM32F7_PINMUX_FUNC_PA2_ETH }, + { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_ETH }, + { STM32_PIN_PG11, STM32F7_PINMUX_FUNC_PG11_ETH }, + { STM32_PIN_PG13, STM32F7_PINMUX_FUNC_PG13_ETH }, + { STM32_PIN_PB13, STM32F7_PINMUX_FUNC_PB13_ETH }, +#endif /* CONFIG_ETH_STM32_HAL */ +#ifdef CONFIG_USB_DC_STM32 + { STM32_PIN_PA11, STM32F7_PINMUX_FUNC_PA11_OTG_FS_DM }, + { STM32_PIN_PA12, STM32F7_PINMUX_FUNC_PA12_OTG_FS_DP }, +#endif /* CONFIG_USB_DC_STM32 */ +#ifdef CONFIG_I2C_1 + { STM32_PIN_PB8, STM32F7_PINMUX_FUNC_PB8_I2C1_SCL }, + { STM32_PIN_PB9, STM32F7_PINMUX_FUNC_PB9_I2C1_SDA }, +#endif +#ifdef CONFIG_PWM_STM32_1 + { STM32_PIN_PE13, STM32F7_PINMUX_FUNC_PE13_PWM1_CH3 }, +#endif /* CONFIG_PWM_STM32_1 */ +#ifdef CONFIG_SPI_1 +#ifdef CONFIG_SPI_STM32_USE_HW_SS + { STM32_PIN_PA4, STM32F7_PINMUX_FUNC_PA4_SPI1_NSS }, +#endif /* CONFIG_SPI_STM32_USE_HW_SS */ + { STM32_PIN_PA5, STM32F7_PINMUX_FUNC_PA5_SPI1_SCK }, + { STM32_PIN_PA6, STM32F7_PINMUX_FUNC_PA6_SPI1_MISO }, + { STM32_PIN_PA7, STM32F7_PINMUX_FUNC_PA7_SPI1_MOSI }, +#endif /* CONFIG_SPI_1 */ +#ifdef CONFIG_CAN_1 + {STM32_PIN_PD0, STM32F7_PINMUX_FUNC_PD0_CAN_RX}, + {STM32_PIN_PD1, STM32F7_PINMUX_FUNC_PD1_CAN_TX}, +#endif /* CONFIG_CAN_1 */ +#ifdef CONFIG_ADC_1 + { STM32_PIN_PA0, STM32F7_PINMUX_FUNC_PA0_ADC123_IN0 }, +#endif /* CONFIG_ADC_1 */ +}; + +static int pinmux_stm32_init(struct device *port) +{ + ARG_UNUSED(port); + + stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + + return 0; +} + +SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, + CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); diff --git a/boards/arm/nucleo_f767zi/support/openocd.cfg b/boards/arm/nucleo_f767zi/support/openocd.cfg new file mode 100644 index 00000000000..097711770e2 --- /dev/null +++ b/boards/arm/nucleo_f767zi/support/openocd.cfg @@ -0,0 +1,12 @@ +source [find board/st_nucleo_f7.cfg] + +$_TARGETNAME configure -event gdb-attach { + echo "Debugger attaching: halting execution" + reset halt + gdb_breakpoint_override hard +} + +$_TARGETNAME configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} diff --git a/soc/arm/st_stm32/stm32f7/Kconfig.defconfig.stm32f767xx b/soc/arm/st_stm32/stm32f7/Kconfig.defconfig.stm32f767xx index 31ed099f948..bdd212fce6e 100644 --- a/soc/arm/st_stm32/stm32f7/Kconfig.defconfig.stm32f767xx +++ b/soc/arm/st_stm32/stm32f7/Kconfig.defconfig.stm32f767xx @@ -1,9 +1,7 @@ -# Kconfig - ST STM32F767ZI MCU configuration options -# +# ST STM32F767ZI MCU configuration options + # Copyright (c) 2019 Roland Ma -# # SPDX-License-Identifier: Apache-2.0 -# if SOC_STM32F767XX @@ -24,4 +22,3 @@ config NUM_IRQS default 110 endif # SOC_STM32F767XX -