From b095d6ce7621fa28583881677d5079a5e08dbe52 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 15 Apr 2021 15:44:48 +0200 Subject: [PATCH] boards: nucleo_f746zg: Use dts for clocks configuration Convert board to use of device tree for clocks configuration. Signed-off-by: Erwan Gouriou --- boards/arm/nucleo_f746zg/nucleo_f746zg.dts | 23 +++++++++++++++++++ .../arm/nucleo_f746zg/nucleo_f746zg_defconfig | 22 +----------------- 2 files changed, 24 insertions(+), 21 deletions(-) diff --git a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts index e82ab76690b..c9576034837 100644 --- a/boards/arm/nucleo_f746zg/nucleo_f746zg.dts +++ b/boards/arm/nucleo_f746zg/nucleo_f746zg.dts @@ -61,6 +61,29 @@ }; }; +&clk_hse { + hse-bypass; + clock-frequency = ; /* STLink 8MHz clock */ + status = "okay"; +}; + +&pll { + div-m = <4>; + mul-n = <72>; + div-p = <2>; + div-q = <3>; + clocks = <&clk_hse>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <2>; + apb2-prescaler = <1>; +}; + &usart2 { pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6 &usart2_rts_pd4 &usart2_cts_pd3>; diff --git a/boards/arm/nucleo_f746zg/nucleo_f746zg_defconfig b/boards/arm/nucleo_f746zg/nucleo_f746zg_defconfig index fb8a70e4089..0b93447e7fb 100644 --- a/boards/arm/nucleo_f746zg/nucleo_f746zg_defconfig +++ b/boards/arm/nucleo_f746zg/nucleo_f746zg_defconfig @@ -2,8 +2,6 @@ CONFIG_SOC_SERIES_STM32F7X=y CONFIG_SOC_STM32F746XX=y -# 72MHz system clock (CubeMX Defaults) -CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 # Enable MPU CONFIG_ARM_MPU=y @@ -24,23 +22,5 @@ CONFIG_PINMUX=y # Enable GPIO CONFIG_GPIO=y -# Clock Configuration +# Enable Clocks CONFIG_CLOCK_CONTROL=y - -# STLINK provides 8MHz clock input -CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 -CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y -# Use HSE as PLL input -CONFIG_CLOCK_STM32_PLL_SRC_HSE=y -# Nucleo-144 boards do not have an external oscillator, so just use -# the 8MHz clock signal coming from integrated STLink -CONFIG_CLOCK_STM32_HSE_BYPASS=y - -# Produce 72MHz clock at PLL output -CONFIG_CLOCK_STM32_PLL_M_DIVISOR=4 -CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=72 -CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2 -CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=3 -CONFIG_CLOCK_STM32_AHB_PRESCALER=1 -CONFIG_CLOCK_STM32_APB1_PRESCALER=2 -CONFIG_CLOCK_STM32_APB2_PRESCALER=1