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arm: aarch64: add Xen virtual machine support

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This commit adds minimal support for running zephyr as Xen guest. It
does not use xen PV console, which is somewhat hard to implement, as it
depends on xenbus infrastructure. Instead SBSA-compatible PL011 uart is
used.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
This commit is contained in:
Volodymyr Babchuk 2020-11-20 17:39:46 +02:00 • committed by Anas Nashif
commit b07065d3f3
12 changed files with 395 additions and 0 deletions
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89
boards/arm/xenvm/xenvm.dts Normal file
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/*
* Copyright (c) 2020 EPAM Systems
*
* SPDX-License-Identifier: Apache-2.0
*
* This file was created by running
*
* # LIBXL_DEBUG_DUMP_DTB=domu-libxl.dtb xl create zephyr.conf
*
* decompilling resulting domu-libxl.dtb and then manually aligning it
* with zephyr requirements.
*/
/dts-v1/;
#include <mem.h>
#include <arm/armv8-a.dtsi>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
model = "XENVM-4.15";
compatible = "xen,xenvm-4.15", "xen,xenvm";
interrupt-parent = <&gic>;
#address-cells = <0x02>;
#size-cells = <0x02>;
chosen {
zephyr,console = &sbsa;
zephyr,shell-uart = &sbsa;
zephyr,sram = &ram;
};
cpus {
#address-cells = <0x01>;
#size-cells = <0x00>;
cpu@0 {
device_type = "cpu";
compatible = "arm,armv8";
enable-method = "psci";
reg = <0x00>;
};
};
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci";
method = "hvc";
label = "PSCI";
};
ram: memory@40000000 {
device_type = "mmio-sram";
reg = <0x00 0x40000000 0x00 DT_SIZE_M(16)>;
};
gic: interrupt-controller@3001000 {
compatible = "arm,gic";
label = "GIC";
#interrupt-cells = <0x04>;
#address-cells = <0x00>;
interrupt-controller;
reg = <0x00 0x3001000 0x00 0x1000 0x00 0x3002000 0x00 0x2000>;
};
timer {
compatible = "arm,arm-timer";
interrupts = <GIC_PPI 0x0d IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY
GIC_PPI 0x0e IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY
GIC_PPI 0x0b IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
label = "arch_timer";
};
hypervisor: hypervisor@38000000 {
compatible = "xen,xen-4.15", "xen,xen";
reg = <0x00 0x38000000 0x00 0x1000000>;
interrupts = <GIC_PPI 0x0f IRQ_TYPE_EDGE IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
};
sbsa: sbsa-pl011@22000000 {
compatible = "arm,sbsa-uart";
reg = <0x00 0x22000000 0x00 0x1000>;
interrupts = <GIC_SPI 0x00 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
interrupt-parent = <&gic>;
current-speed = <0x1c200>;
label = "UART";
};
};