diff --git a/soc/nxp/common/Kconfig.rom_loader b/soc/nxp/common/Kconfig.rom_loader
new file mode 100644
index 00000000000..9efcdff9227
--- /dev/null
+++ b/soc/nxp/common/Kconfig.rom_loader
@@ -0,0 +1,21 @@
+# Copyright 2024 NXP
+# SPDX-License-Identifier: Apache-2.0
+
+config NXP_FLEXSPI_ROM_RAMLOADER
+	bool "Create output image that NXP ROM can load from FlexSPI to ram"
+	select BUILD_OUTPUT_HEX
+	depends on !FLASH_MCUX_FLEXSPI_XIP
+	help
+	  Builds an output image that the BootROM can load from the
+	  FlexSPI boot device into RAM region. The image will be loaded
+	  from FLEXSPI into the region specified by `zephyr,flash` node.
+
+if NXP_FLEXSPI_ROM_RAMLOADER
+
+FLASH_CHOSEN := zephyr,flash
+FLASH_BASE := $(dt_chosen_reg_addr_hex,$(FLASH_CHOSEN))
+FLEXSPI_BASE := $(dt_nodelabel_reg_addr_hex,flexspi,1)
+config BUILD_OUTPUT_ADJUST_LMA
+	default "$(FLEXSPI_BASE) - $(FLASH_BASE)"
+
+endif # NXP_FLEXSPI_ROM_RAMLOADER
diff --git a/soc/nxp/imxrt/Kconfig b/soc/nxp/imxrt/Kconfig
index b33757ad7f1..b707e7d8514 100644
--- a/soc/nxp/imxrt/Kconfig
+++ b/soc/nxp/imxrt/Kconfig
@@ -25,6 +25,8 @@ config NXP_IMXRT_BOOT_HEADER
 
 if NXP_IMXRT_BOOT_HEADER
 
+rsource "../common/Kconfig.rom_loader"
+
 choice BOOT_DEVICE
 	prompt "Boot device"
 	default BOOT_FLEXSPI_NOR
@@ -103,23 +105,6 @@ config NXP_IMX_EXTERNAL_SDRAM
 	  an MPU region will be defined to disable cached access to the
 	  SDRAM memory space.
 
-config NXP_IMX_RT_ROM_RAMLOADER
-	depends on !FLASH_MCUX_FLEXSPI_XIP && NXP_IMXRT_BOOT_HEADER
-	# Required so that debugger will load image to correct offset
-	select BUILD_OUTPUT_HEX
-	bool "Create output image that IMX RT ROM can load from FlexSPI to ram"
-	help
-	  Builds an output image that the IMX RT BootROM can load from the
-	  FlexSPI boot device into RAM region. The image will be loaded
-	  from FLEXSPI into the region specified by `zephyr,flash` node.
-
-# Setup LMA adjustment if using the RAMLOADER feature of ROM
-FLASH_CHOSEN := zephyr,flash
-FLASH_BASE := $(dt_chosen_reg_addr_hex,$(FLASH_CHOSEN))
-FLEXSPI_BASE := $(dt_node_reg_addr_hex,/soc/spi@402a8000,1)
-config BUILD_OUTPUT_ADJUST_LMA
-	default "$(FLEXSPI_BASE) - $(FLASH_BASE)" if NXP_IMX_RT_ROM_RAMLOADER
-
 config SECOND_CORE_MCUX
 	bool "Dual core operation on the RT11xx series"
 	depends on SOC_SERIES_IMXRT11XX
diff --git a/soc/nxp/imxrt/imxrt6xx/Kconfig.defconfig b/soc/nxp/imxrt/imxrt6xx/Kconfig.defconfig
index 94b1d951821..9aa15420f22 100644
--- a/soc/nxp/imxrt/imxrt6xx/Kconfig.defconfig
+++ b/soc/nxp/imxrt/imxrt6xx/Kconfig.defconfig
@@ -28,13 +28,6 @@ config NUM_IRQS
 config ZTEST_NO_YIELD
 	default y if (ZTEST && PM)
 
-# Setup LMA adjustment if using the RAMLOADER feature of ROM
-FLASH_CHOSEN := zephyr,flash
-FLASH_BASE := $(dt_chosen_reg_addr_hex,$(FLASH_CHOSEN))
-FLEXSPI_BASE := $(dt_node_reg_addr_hex,/soc/spi@134000,1)
-config BUILD_OUTPUT_ADJUST_LMA
-	default "$(FLEXSPI_BASE) - $(FLASH_BASE)" if NXP_IMX_RT_ROM_RAMLOADER
-
 #
 # MBEDTLS is larger but much faster than TinyCrypt so choose wisely
 #
diff --git a/soc/nxp/rw/Kconfig b/soc/nxp/rw/Kconfig
index c2ebfaf6bc3..b32ec7660f2 100644
--- a/soc/nxp/rw/Kconfig
+++ b/soc/nxp/rw/Kconfig
@@ -29,6 +29,8 @@ menuconfig NXP_RW6XX_BOOT_HEADER
 
 if NXP_RW6XX_BOOT_HEADER
 
+rsource "../common/Kconfig.rom_loader"
+
 config FLASH_CONFIG_OFFSET
 	hex "Flash config data offset"
 	default 0x400
@@ -49,14 +51,4 @@ endif # NXP_RW6XX_BOOT_HEADER
 
 rsource "../common/Kconfig.flexspi_xip"
 
-config NXP_RW_ROM_RAMLOADER
-	depends on !FLASH_MCUX_FLEXSPI_XIP
-	# Required so that debugger will load image to correct offset
-	select BUILD_OUTPUT_HEX
-	bool "Create output image that RW ROM can load from FlexSPI to ram"
-	help
-	  Builds an output image that the RW BootROM can load from the
-	  FlexSPI boot device into RAM region. The image will be loaded
-	  from FLEXSPI into the region specified by `zephyr,flash` node.
-
 endif # SOC_SERIES_RW6XX
diff --git a/soc/nxp/rw/Kconfig.defconfig b/soc/nxp/rw/Kconfig.defconfig
index c32cf91e346..5354f455914 100644
--- a/soc/nxp/rw/Kconfig.defconfig
+++ b/soc/nxp/rw/Kconfig.defconfig
@@ -23,21 +23,6 @@ config SYS_CLOCK_HW_CYCLES_PER_SEC
 
 endif # CORTEX_M_SYSTICK
 
-# The base address is determined from the zephyr,flash node with the following
-# precedence:
-# FlexSPI base address (if flash node is on a FlexSPI bus)
-# node reg property (used for memory regions such as SRAM)
-
-if NXP_RW_ROM_RAMLOADER
-
-DT_CHOSEN_Z_FLASH := zephyr,flash
-FLASH_BASE := $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_FLASH))
-FLEXSPI_BASE := $(dt_node_reg_addr_hex,/soc/spi@134000,1)
-config BUILD_OUTPUT_ADJUST_LMA
-	default "$(FLEXSPI_BASE) - $(FLASH_BASE)"
-
-endif # NXP_RW_ROM_RAMLOADER
-
 if BT
 
 config FLASH