diff --git a/boards/arm/nucleo_l476rg/Kconfig.board b/boards/arm/nucleo_l476rg/Kconfig.board new file mode 100644 index 00000000000..82d9645f698 --- /dev/null +++ b/boards/arm/nucleo_l476rg/Kconfig.board @@ -0,0 +1,21 @@ +# Kconfig - STM32L476RG Nucleo board configuration +# +# Copyright (c) 2016 Open-RnD Sp. z o.o. +# Copyright (c) 2016 BayLibre, SAS +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +config BOARD_NUCLEO_L476RG + bool "Nucleo L476RG Development Board" + depends on SOC_STM32L476XX diff --git a/boards/arm/nucleo_l476rg/Kconfig.defconfig b/boards/arm/nucleo_l476rg/Kconfig.defconfig new file mode 100644 index 00000000000..d2370a232c6 --- /dev/null +++ b/boards/arm/nucleo_l476rg/Kconfig.defconfig @@ -0,0 +1,24 @@ +# Kconfig - STM32L476RG Nucleo board configuration +# +# Copyright (c) 2016 Open-RnD Sp. z o.o. +# Copyright (c) 2016 BayLibre, SAS +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# + +if BOARD_NUCLEO_L476RG + +config BOARD + default nucleo_l476rg + +endif # BOARD_NUCLEO_L476RG diff --git a/boards/arm/nucleo_l476rg/Makefile b/boards/arm/nucleo_l476rg/Makefile new file mode 100644 index 00000000000..c925263c43a --- /dev/null +++ b/boards/arm/nucleo_l476rg/Makefile @@ -0,0 +1,2 @@ +# No C files (yet) +obj- += dummy.o diff --git a/boards/arm/nucleo_l476rg/board.h b/boards/arm/nucleo_l476rg/board.h new file mode 100644 index 00000000000..55029f6e450 --- /dev/null +++ b/boards/arm/nucleo_l476rg/board.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2015 Intel Corporation + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __INC_BOARD_H +#define __INC_BOARD_H + +#include + +#endif /* __INC_BOARD_H */ diff --git a/boards/arm/nucleo_l476rg/nucleo_l476rg_defconfig b/boards/arm/nucleo_l476rg/nucleo_l476rg_defconfig new file mode 100644 index 00000000000..df09a7b5955 --- /dev/null +++ b/boards/arm/nucleo_l476rg/nucleo_l476rg_defconfig @@ -0,0 +1,51 @@ +CONFIG_ARM=y +CONFIG_BOARD_STM32_NUCLEO_L476RG=y +CONFIG_SOC_FAMILY_STM32=y +CONFIG_SOC_SERIES_STM32L4X=y +CONFIG_SOC_STM32L476XX=y +CONFIG_CORTEX_M_SYSTICK=y +# 80MHz system clock +CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=80000000 + +# enable uart driver +CONFIG_SERIAL=y +CONFIG_UART_STM32=y +CONFIG_UART_STM32_PORT_2=y +CONFIG_UART_STM32_PORT_2_BAUD_RATE=115200 + +# enable pinmux +CONFIG_PINMUX=y +CONFIG_PINMUX_STM32=y + +# enable GPIOs +CONFIG_GPIO=y +CONFIG_GPIO_STM32=y +CONFIG_GPIO_STM32_PORTA=y +CONFIG_GPIO_STM32_PORTB=y +CONFIG_GPIO_STM32_PORTC=y +CONFIG_GPIO_STM32_PORTD=y +CONFIG_GPIO_STM32_PORTE=y +CONFIG_GPIO_STM32_PORTF=y +CONFIG_GPIO_STM32_PORTG=y +CONFIG_GPIO_STM32_PORTH=y + +# clock configuration +CONFIG_CLOCK_CONTROL=y +CONFIG_CLOCK_CONTROL_STM32L4X=y +CONFIG_CLOCK_STM32L4X_SYSCLK_SRC_PLL=y +# use 16MHz oscillator +CONFIG_CLOCK_STM32F10X_PLL_SRC_HSI=y +# produce 80MHz clock at PLL output +CONFIG_CLOCK_STM32L4X_PLL_DIVISOR=1 +CONFIG_CLOCK_STM32L4X_PLL_MULTIPLIER=20 +CONFIG_CLOCK_STM32L4X_PLL_P_DIVISOR=7 +CONFIG_CLOCK_STM32L4X_PLL_Q_DIVISOR=2 +CONFIG_CLOCK_STM32L4X_PLL_R_DIVISOR=4 +CONFIG_CLOCK_STM32L4X_AHB_PRESCALER=0 +CONFIG_CLOCK_STM32L4X_APB1_PRESCALER=0 +CONFIG_CLOCK_STM32L4X_APB2_PRESCALER=0 + +# console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y +CONFIG_UART_CONSOLE_ON_DEV_NAME="UART_2" diff --git a/drivers/pinmux/Makefile b/drivers/pinmux/Makefile index 322762665e7..b0114922c41 100644 --- a/drivers/pinmux/Makefile +++ b/drivers/pinmux/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_PINMUX_BEETLE) += beetle/pinmux_board_v2m_beetle.o obj-$(CONFIG_BOARD_NUCLEO_F103RB) += stm32/pinmux_board_nucleo_f103rb.o obj-$(CONFIG_BOARD_NUCLEO_F401RE) += stm32/pinmux_board_nucleo_f401re.o obj-$(CONFIG_BOARD_96B_CARBON) += stm32/pinmux_board_carbon.o +obj-$(CONFIG_BOARD_NUCLEO_L476RG) += stm32/pinmux_board_nucleo_l476rg.o obj-$(CONFIG_BOARD_OLIMEXINO_STM32) += stm32/pinmux_board_olimexino_stm32.o obj-$(CONFIG_BOARD_STM32_MINI_A15) += stm32/pinmux_board_stm32_mini_a15.o diff --git a/drivers/pinmux/stm32/pinmux_board_nucleo_l476rg.c b/drivers/pinmux/stm32/pinmux_board_nucleo_l476rg.c new file mode 100644 index 00000000000..06d9990c965 --- /dev/null +++ b/drivers/pinmux/stm32/pinmux_board_nucleo_l476rg.c @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2016 Open-RnD Sp. z o.o. + * Copyright (c) 2016 BayLibre, SAS + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include +#include +#include +#include +#include "pinmux/pinmux.h" + +#include "pinmux_stm32.h" + +/* pin assignments for NUCLEO-L476RG board */ +static const struct pin_config pinconf[] = { +#ifdef CONFIG_UART_STM32_PORT_1 + {STM32_PIN_PA9, STM32L4X_PINMUX_FUNC_PA9_USART1_TX}, + {STM32_PIN_PA10, STM32L4X_PINMUX_FUNC_PA10_USART1_RX}, +#endif /* CONFIG_UART_STM32_PORT_1 */ +#ifdef CONFIG_UART_STM32_PORT_2 + {STM32_PIN_PA2, STM32L4X_PINMUX_FUNC_PA2_USART2_TX}, + {STM32_PIN_PA3, STM32L4X_PINMUX_FUNC_PA3_USART2_RX}, +#endif /* CONFIG_UART_STM32_PORT_2 */ +#ifdef CONFIG_UART_STM32_PORT_3 + {STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_USART3_TX}, + {STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_USART3_RX}, +#endif /* CONFIG_UART_STM32_PORT_3 */ +#ifdef CONFIG_I2C_0 + {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_I2C1_SCL}, + {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_I2C1_SDA}, +#endif /* CONFIG_I2C_0 */ +}; + +static int pinmux_stm32_init(struct device *port) +{ + ARG_UNUSED(port); + + stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + + return 0; +} + +SYS_INIT(pinmux_stm32_init, PRE_KERNEL_1, + CONFIG_PINMUX_STM32_DEVICE_INITIALIZATION_PRIORITY); diff --git a/scripts/sanity_chk/arches/arm.ini b/scripts/sanity_chk/arches/arm.ini index bcaed30bb30..8961d0db857 100644 --- a/scripts/sanity_chk/arches/arm.ini +++ b/scripts/sanity_chk/arches/arm.ini @@ -4,7 +4,7 @@ platforms = qemu_cortex_m3 frdm_k64f arduino_due nucleo_f103rb stm32_mini_a15 olimexino_stm32 96b_nitrogen nrf52_pca10040 hexiwear_k64 nrf51_pca10028 nucleo_f401re 96b_carbon nrf51_blenano arduino_101_ble cc3200_launchxl quark_se_c1000_ble bbc_microbit - v2m_beetle + v2m_beetle nucleo_l476rg supported_toolchains = zephyr gccarmemb [qemu_cortex_m3]