boards: khadas: adding support for the edge2
added the khadas edge2 board and its soc rk3588s Signed-off-by: Esteban Aguililla Klein <esteban.aguililla.klein.pro@outlook.com>
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5
boards/khadas/edge2/Kconfig.khadas_edge2
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5
boards/khadas/edge2/Kconfig.khadas_edge2
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# Copyright 2024 Université Gustave Eiffel
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_KHADAS_EDGE2
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select SOC_RK3588S
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6
boards/khadas/edge2/board.yml
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boards/khadas/edge2/board.yml
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board:
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name: khadas_edge2
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full_name: Edge2
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vendor: khadas
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socs:
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- name: rk3588s
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97
boards/khadas/edge2/doc/index.rst
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97
boards/khadas/edge2/doc/index.rst
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.. zephyr:board:: khadas_edge2
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Overview
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********
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See `Product page`_
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.. _Product page: https://www.khadas.com/edge2
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Hardware
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********
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See `Hardware details`_
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.. _Hardware details: https://docs.khadas.com/products/sbc/edge2/hardware/start
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Supported Features
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==================
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The ``khadas_edge2`` board target supports the following
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hardware features:
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+-----------+------------+--------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+======================================+
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| GIC-600 | on-chip | GICv3 interrupt controller |
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+-----------+------------+--------------------------------------+
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| ARM TIMER | on-chip | System Clock |
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+-----------+------------+--------------------------------------+
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| UART | on-chip | Synopsys DesignWare 8250 serial port |
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+-----------+------------+--------------------------------------+
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Other hardware features have not been enabled yet for this board.
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The default configuration can be found in (NON-SMP)
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:zephyr_file:`boards/khadas/edge2/khadas_edge2_defconfig`
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There are multiple serial ports on the board: Zephyr is using
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uart2 as serial console.
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Programming and Debugging
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*************************
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Use the following configuration to run basic Zephyr applications and
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kernel tests on Khadas Edge2 board. For example, with the :zephyr:code-sample:`hello_world`:
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1. Non-SMP mode
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:host-os: unix
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:board: khadas_edge2
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:goals: build
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This will build an image with the hello world sample app.
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Build the zephyr image:
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.. code-block:: console
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mkimage -C none -A arm64 -O linux -a 0x10000000 -e 0x10000000 -d build/zephyr/zephyr.bin build/zephyr/zephyr.img
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Burn the image on the board (we choose to use Rockchip burning tool `rkdeveloptool <https://github.com/rockchip-linux/rkdeveloptool.git>`_, you will need a `SPL <http://dl.khadas.com/products/edge2/firmware/boot/>`_ which is provided by khadas:
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.. code-block:: console
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rkdeveloptool db rk3588_spl_loader_*; rkdeveloptool wl 0x100000 zephyr.img; rkdeveloptool rd
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The sector 0x100000 was chosen arbitrarily (far away from U-Boot image)
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Use U-Boot to load and run Zephyr:
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.. code-block:: console
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mmc read ${pxefile_addr_r} 0x100000 0x1000; bootm start ${pxefile_addr_r}; bootm loados; bootm go
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0x1000 is the size (in number of sectors) or your image. Increase it if needed.
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It will display the following console output:
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.. code-block:: console
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*** Booting Zephyr OS build XXXXXXXXXXXX ***
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Hello World! khadas_edge2
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Flashing
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========
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Zephyr image can be loaded in DDR memory at address 0x10000000 from SD Card,
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EMMC, QSPI Flash or downloaded from network in uboot.
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References
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==========
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`Edge2 Documentation`_
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.. _Edge2 Documentation: https://docs.khadas.com/products/sbc/edge2/start
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BIN
boards/khadas/edge2/doc/khadas_edge2.jpg
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BIN
boards/khadas/edge2/doc/khadas_edge2.jpg
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Binary file not shown.
After Width: | Height: | Size: 45 KiB |
33
boards/khadas/edge2/khadas_edge2.dts
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boards/khadas/edge2/khadas_edge2.dts
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/*
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* Copyright 2024 Université Gustave Eiffel
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include <rockchip/rk3588s.dtsi>
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/ {
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model = "Khadas Edge2";
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compatible = "khadas,edge2";
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &uart2;
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zephyr,shell-uart = &uart2;
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};
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cpus {
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/delete-node/ cpu@1;
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/delete-node/ cpu@2;
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/delete-node/ cpu@3;
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/delete-node/ cpu@4;
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/delete-node/ cpu@5;
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/delete-node/ cpu@6;
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/delete-node/ cpu@7;
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};
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};
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&uart2 {
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status = "okay";
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};
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boards/khadas/edge2/khadas_edge2.yaml
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boards/khadas/edge2/khadas_edge2.yaml
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identifier: khadas_edge2
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name: Khadas Edge2 (single core, non SMP)
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type: mcu
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arch: arm64
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toolchain:
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- zephyr
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- cross-compile
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ram: 8192
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vendor: khadas
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boards/khadas/edge2/khadas_edge2_defconfig
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boards/khadas/edge2/khadas_edge2_defconfig
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# Copyright 2024 Université Gustave Eiffel
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# SPDX-License-Identifier: Apache-2.0
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# Platform Configuration
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CONFIG_ARM64_VA_BITS_40=y
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CONFIG_ARM64_PA_BITS_40=y
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=24000000
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CONFIG_CACHE_MANAGEMENT=y
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CONFIG_ARMV8_A_NS=y
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# Serial Drivers
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CONFIG_SERIAL=y
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CONFIG_UART_INTERRUPT_DRIVEN=y
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# Enable Console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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dts/arm64/rockchip/rk3588s.dtsi
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dts/arm64/rockchip/rk3588s.dtsi
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/*
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* Copyright 2024 Université Gustave Eiffel
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <arm64/armv8-a.dtsi>
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#include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
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#include <mem.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x100>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x200>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x300>;
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};
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cpu@4 {
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device_type = "cpu";
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compatible = "arm,cortex-a76";
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reg = <0x400>;
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};
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cpu@5 {
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device_type = "cpu";
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compatible = "arm,cortex-a76";
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reg = <0x500>;
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};
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cpu@6 {
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device_type = "cpu";
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compatible = "arm,cortex-a76";
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reg = <0x600>;
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};
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cpu@7 {
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device_type = "cpu";
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compatible = "arm,cortex-a76";
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reg = <0x700>;
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};
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};
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gic: interrupt-controller@fe600000 {
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#address-cells = <1>;
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compatible = "arm,gic-v3", "arm,gic";
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reg = <0xfe600000 0x10000>, /* GICD */
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<0xfe680000 0x100000>; /* GICR */
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interrupt-controller;
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#interrupt-cells = <4>;
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status = "okay";
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};
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sram0: memory@10000000 {
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reg = <0x10000000 DT_SIZE_M(128)>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupt-parent = <&gic>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL
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IRQ_DEFAULT_PRIORITY>;
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};
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uart2: serial@feb50000 {
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compatible = "rockchip,rk3588s-uart", "ns16550";
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reg = <0xfeb50000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 333 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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status = "disabled";
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reg-shift = <2>;
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clock-frequency = <350000000>;
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};
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};
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@ -3,4 +3,6 @@
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if(CONFIG_SOC_RK3568)
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add_subdirectory(rk3568)
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elseif(CONFIG_SOC_RK3588S)
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add_subdirectory(rk3588s)
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endif()
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6
soc/rockchip/rk35/rk3588s/CMakeLists.txt
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6
soc/rockchip/rk35/rk3588s/CMakeLists.txt
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# Copyright 2024 Université Gustave Eiffel
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# SPDX-License-Identifier: Apache-2.0
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zephyr_sources_ifdef(CONFIG_ARM_MMU mmu_regions.c)
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm64/scripts/linker.ld CACHE INTERNAL "")
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soc/rockchip/rk35/rk3588s/Kconfig
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10
soc/rockchip/rk35/rk3588s/Kconfig
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# Copyright 2024 Université Gustave Eiffel
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# SPDX-License-Identifier: Apache-2.0
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config SOC_RK3588S
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select ARM64
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select CPU_CORTEX_A55
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select ARM_ARCH_TIMER if SYS_CLOCK_EXISTS
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config SOC_PART_NUMBER
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default "RK3588S" if SOC_RK3588S
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8
soc/rockchip/rk35/rk3588s/Kconfig.defconfig
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8
soc/rockchip/rk35/rk3588s/Kconfig.defconfig
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# Copyright 2024 Université Gustave Eiffel
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# SPDX-License-Identifier: Apache-2.0
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if SOC_RK3588S
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rsource "Kconfig.defconfig.rk3588s"
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endif # SOC_RK3588S
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soc/rockchip/rk35/rk3588s/Kconfig.defconfig.rk3588s
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19
soc/rockchip/rk35/rk3588s/Kconfig.defconfig.rk3588s
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# Copyright 2024 Université Gustave Eiffel
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# SPDX-License-Identifier: Apache-2.0
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if SOC_RK3588S
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config NUM_IRQS
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default 544
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config FLASH_SIZE
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default 0
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config FLASH_BASE_ADDRESS
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default 0
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config UART_NS16550_ACCESS_WORD_ONLY
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default y
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depends on UART_NS16550
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endif
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9
soc/rockchip/rk35/rk3588s/Kconfig.soc
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9
soc/rockchip/rk35/rk3588s/Kconfig.soc
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# Copyright 2024 Université Gustave Eiffel
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# SPDX-License-Identifier: Apache-2.0
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config SOC_RK3588S
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bool
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select SOC_SERIES_RK35
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config SOC
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default "rk3588s" if SOC_RK3588S
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26
soc/rockchip/rk35/rk3588s/mmu_regions.c
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26
soc/rockchip/rk35/rk3588s/mmu_regions.c
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/*
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* Copyright 2024 Université Gustave Eiffel
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/devicetree.h>
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#include <zephyr/sys/util.h>
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#include <zephyr/arch/arm64/arm_mmu.h>
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static const struct arm_mmu_region mmu_regions[] = {
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MMU_REGION_FLAT_ENTRY("GIC",
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DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 0),
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DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 0),
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MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE),
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MMU_REGION_FLAT_ENTRY("GIC",
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DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1),
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DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1),
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MT_DEVICE_nGnRnE | MT_P_RW_U_NA | MT_DEFAULT_SECURE_STATE),
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};
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const struct arm_mmu_config mmu_config = {
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.num_regions = ARRAY_SIZE(mmu_regions),
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.mmu_regions = mmu_regions,
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};
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- name: rk3399
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- name: rk35
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socs:
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- name: rk3588s
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- name: rk3568
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