can: nxp_s32_canxl: use clock control APIs
Use clock control API to retrieve the module's frequency and update the boards using it to provide the source clocks. Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
parent
89935550ce
commit
af7d972f4c
7 changed files with 27 additions and 13 deletions
|
@ -1,10 +1,11 @@
|
|||
# Copyright 2022 NXP
|
||||
# Copyright 2022-2023 NXP
|
||||
# SPDX-License-Identifier: Apache-2.0
|
||||
|
||||
config CAN_NXP_S32_CANXL
|
||||
bool "NXP S32 CANXL driver"
|
||||
default y
|
||||
depends on DT_HAS_NXP_S32_CANXL_ENABLED
|
||||
select CLOCK_CONTROL
|
||||
help
|
||||
Enable support for NXP S32 CANXL driver.
|
||||
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright 2022 NXP
|
||||
* Copyright 2022-2023 NXP
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
@ -8,6 +8,7 @@
|
|||
#include <zephyr/sys/atomic.h>
|
||||
#include <zephyr/drivers/can.h>
|
||||
#include <zephyr/drivers/can/transceiver.h>
|
||||
#include <zephyr/drivers/clock_control.h>
|
||||
#include <zephyr/device.h>
|
||||
#include <zephyr/drivers/pinctrl.h>
|
||||
#include <zephyr/logging/log.h>
|
||||
|
@ -66,7 +67,8 @@ struct can_nxp_s32_config {
|
|||
CANXL_GRP_CONTROL_Type *base_grp_ctrl;
|
||||
CANXL_DSC_CONTROL_Type *base_dsc_ctrl;
|
||||
uint8 instance;
|
||||
uint32_t clock_can;
|
||||
const struct device *clock_dev;
|
||||
clock_control_subsys_t clock_subsys;
|
||||
uint32_t bitrate;
|
||||
uint32_t sample_point;
|
||||
uint32_t sjw;
|
||||
|
@ -286,9 +288,7 @@ static int can_nxp_s32_get_core_clock(const struct device *dev, uint32_t *rate)
|
|||
|
||||
__ASSERT_NO_MSG(rate != NULL);
|
||||
|
||||
*rate = config->clock_can;
|
||||
|
||||
return 0;
|
||||
return clock_control_get_rate(config->clock_dev, config->clock_subsys, rate);
|
||||
}
|
||||
|
||||
static int can_nxp_s32_get_max_filters(const struct device *dev, bool ide)
|
||||
|
@ -829,6 +829,17 @@ static int can_nxp_s32_init(const struct device *dev)
|
|||
}
|
||||
}
|
||||
|
||||
if (!device_is_ready(config->clock_dev)) {
|
||||
LOG_ERR("Clock control device not ready");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
err = clock_control_on(config->clock_dev, config->clock_subsys);
|
||||
if (err) {
|
||||
LOG_ERR("Failed to enable clock");
|
||||
return err;
|
||||
}
|
||||
|
||||
k_mutex_init(&data->rx_mutex);
|
||||
k_mutex_init(&data->tx_mutex);
|
||||
k_sem_init(&data->tx_allocs_sem, CONFIG_CAN_NXP_S32_MAX_TX, CONFIG_CAN_NXP_S32_MAX_TX);
|
||||
|
@ -1060,7 +1071,9 @@ static const struct can_driver_api can_nxp_s32_driver_api = {
|
|||
.base_dsc_ctrl = (CANXL_DSC_CONTROL_Type *) \
|
||||
DT_REG_ADDR_BY_NAME(CAN_NXP_S32_NODE(n), dsc_ctrl), \
|
||||
.instance = n, \
|
||||
.clock_can = DT_PROP(CAN_NXP_S32_NODE(n), clock_frequency), \
|
||||
.clock_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(CAN_NXP_S32_NODE(n))), \
|
||||
.clock_subsys = (clock_control_subsys_t) \
|
||||
DT_CLOCKS_CELL(CAN_NXP_S32_NODE(n), name), \
|
||||
.bitrate = DT_PROP(CAN_NXP_S32_NODE(n), bus_speed), \
|
||||
.sjw = DT_PROP(CAN_NXP_S32_NODE(n), sjw), \
|
||||
.prop_seg = DT_PROP_OR(CAN_NXP_S32_NODE(n), prop_seg, 0), \
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue