soc: arm: nxp: add lpc55x26 support

Add basic support for the LPC55x26 SoCs

Signed-off-by: Maxime Vincent <maxime@veemax.be>

drivers/usb/device/usb_dc_mcux.c

@@ -78,7 +78,7 @@ BUILD_ASSERT(NUM_INSTS <= 1, "Only one USB device supported");
 /* Controller ID is for HAL usage */
 #if defined(CONFIG_SOC_SERIES_IMXRT5XX) || \
 	defined(CONFIG_SOC_SERIES_IMXRT6XX) || \
-	defined(CONFIG_SOC_LPC55S28) || \
+	defined(CONFIG_SOC_LPC55S26) || defined(CONFIG_SOC_LPC55S28) || \
 	defined(CONFIG_SOC_LPC55S16)
 #define CONTROLLER_ID	kUSB_ControllerLpcIp3511Hs0
 #elif defined(CONFIG_SOC_LPC55S36)

dts/arm/nxp/nxp_lpc55S26_ns.dtsi

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2024 Maxime Vincent <maxime@veemax.be>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	soc {
+		sram: sram@400000 {
+			ranges = <0x4000000 0x4000000 0x20000000>;
+		};
+
+		peripheral: peripheral@40000000 {
+			ranges = <0x0 0x40000000 0x10000000>;
+		};
+	};
+};
+
+#include "nxp_lpc55S2x_common.dtsi"
+
+&iap {
+	status = "okay";
+};

soc/nxp/lpc/lpc55xxx/Kconfig

@@ -31,6 +31,17 @@ config SOC_LPC55S16
 	select HAS_MCUX_MCAN
 	select HAS_MCUX_RNG
 
+config SOC_LPC55S26
+	select CPU_CORTEX_M33
+	select CPU_HAS_ARM_SAU
+	select CPU_HAS_ARM_MPU
+	select CPU_HAS_FPU
+	select ARMV8_M_DSP
+	select HAS_MCUX_IAP
+	select HAS_MCUX_LPADC
+	select HAS_MCUX_LPC_DMA
+	select HAS_MCUX_RNG
+
 config SOC_LPC55S28
 	select CPU_CORTEX_M33
 	select CPU_HAS_ARM_SAU

soc/nxp/lpc/lpc55xxx/Kconfig.defconfig

@@ -58,6 +58,14 @@ endchoice
 
 endif # SOC_LPC55S16
 
+if SOC_LPC55S26
+
+choice USB_MCUX_CONTROLLER_TYPE
+	default USB_DC_NXP_LPCIP3511
+endchoice
+
+endif # SOC_LPC55S26
+
 if SOC_LPC55S28
 
 choice USB_MCUX_CONTROLLER_TYPE

soc/nxp/lpc/lpc55xxx/Kconfig.soc

@@ -16,6 +16,10 @@ config SOC_LPC55S16
 	bool
 	select SOC_SERIES_LPC55XXX
 
+config SOC_LPC55S26
+	bool
+	select SOC_SERIES_LPC55XXX
+
 config SOC_LPC55S28
 	bool
 	select SOC_SERIES_LPC55XXX
@@ -40,6 +44,7 @@ config SOC
 	default "lpc55s69" if SOC_LPC55S69_CPU0 || SOC_LPC55S69_CPU1
 	default "lpc55s06" if SOC_LPC55S06
 	default "lpc55s16" if SOC_LPC55S16
+	default "lpc55s26" if SOC_LPC55S26
 	default "lpc55s28" if SOC_LPC55S28
 	default "lpc55s36" if SOC_LPC55S36
 
@@ -52,6 +57,12 @@ config SOC_PART_NUMBER_LPC55S16JBD64
 config SOC_PART_NUMBER_LPC55S16JBD100
 	bool
 
+config SOC_PART_NUMBER_LPC55S26JBD64
+	bool
+
+config SOC_PART_NUMBER_LPC55S26JBD100
+	bool
+
 config SOC_PART_NUMBER_LPC55S28JBD100
 	bool
 
@@ -68,6 +79,8 @@ config SOC_PART_NUMBER
 	default "LPC55S06JBD64"  if SOC_PART_NUMBER_LPC55S06JBD64
 	default "LPC55S16JBD64" if SOC_PART_NUMBER_LPC55S16JBD64
 	default "LPC55S16JBD100" if SOC_PART_NUMBER_LPC55S16JBD100
+	default "LPC55S26JBD64" if SOC_PART_NUMBER_LPC55S26JBD64
+	default "LPC55S26JBD100" if SOC_PART_NUMBER_LPC55S26JBD100
 	default "LPC55S28JBD100" if SOC_PART_NUMBER_LPC55S28JBD100
 	default "LPC55S36JBD100" if SOC_PART_NUMBER_LPC55S36JBD100
 	default "LPC55S69JBD100" if SOC_PART_NUMBER_LPC55S69JBD100

soc/nxp/lpc/lpc55xxx/soc.c

@@ -88,8 +88,8 @@ static ALWAYS_INLINE void clock_init(void)
 #endif
 
 #if defined(CONFIG_SOC_LPC55S06) || defined(CONFIG_SOC_LPC55S16) || \
-	defined(CONFIG_SOC_LPC55S28) || defined(CONFIG_SOC_LPC55S36) || \
+	defined(CONFIG_SOC_LPC55S26) || defined(CONFIG_SOC_LPC55S28) || \
-	defined(CONFIG_SOC_LPC55S69_CPU0)
+	defined(CONFIG_SOC_LPC55S36) || defined(CONFIG_SOC_LPC55S69_CPU0)
 	/* Set up the clock sources */
 	/* Configure FRO192M */
 	/* Ensure FRO is on  */

soc/nxp/lpc/soc.yml

@@ -19,6 +19,7 @@ family:
     socs:
     - name: lpc55s06
     - name: lpc55s16
+    - name: lpc55s26
     - name: lpc55s28
     - name: lpc55s36
     - name: lpc55s69