diff --git a/soc/nxp/imx/imx8m/a53/pinctrl_soc.h b/soc/nxp/imx/imx8m/a53/pinctrl_soc.h index 51e9e58b2f2..a1286f6f180 100644 --- a/soc/nxp/imx/imx8m/a53/pinctrl_soc.h +++ b/soc/nxp/imx/imx8m/a53/pinctrl_soc.h @@ -19,11 +19,18 @@ extern "C" { #define MCUX_IMX_BIAS_PULL_UP_SHIFT IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT #define MCUX_IMX_BIAS_PULL_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_PE_SHIFT #define MCUX_IMX_DRIVE_OPEN_DRAIN_SHIFT IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT -#define MCUX_IMX_SLEW_RATE_SHIFT IOMUXC_SW_PAD_CTL_PAD_FSEL_SHIFT -#define MCUX_IMX_DRIVE_STRENGTH_SHIFT IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT #define MCUX_IMX_INPUT_ENABLE_SHIFT 31 /* Shift to a bit not used by IOMUXC_SW_PAD_CTL */ #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1) +#if defined(CONFIG_SOC_MIMX8MM6_A53) || defined(CONFIG_SOC_MIMX8MN6_A53) +/* fixed for DSE and FSEL for as there is one bit not used in these field */ +#define MCUX_IMX_SLEW_RATE_SHIFT (IOMUXC_SW_PAD_CTL_PAD_FSEL_SHIFT + 1) +#define MCUX_IMX_DRIVE_STRENGTH_SHIFT (IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT + 1) +#else +#define MCUX_IMX_SLEW_RATE_SHIFT IOMUXC_SW_PAD_CTL_PAD_FSEL_SHIFT +#define MCUX_IMX_DRIVE_STRENGTH_SHIFT IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT +#endif + #define Z_PINCTRL_MCUX_IMX_PINCFG_INIT(node_id) \ ((DT_PROP(node_id, input_schmitt_enable) << MCUX_IMX_INPUT_SCHMITT_ENABLE_SHIFT) | \ (DT_PROP(node_id, bias_pull_up) << MCUX_IMX_BIAS_PULL_UP_SHIFT) | \ diff --git a/soc/nxp/imx/imx8m/m4_mini/pinctrl_soc.h b/soc/nxp/imx/imx8m/m4_mini/pinctrl_soc.h index ceb9d33eff0..754bf5826b6 100644 --- a/soc/nxp/imx/imx8m/m4_mini/pinctrl_soc.h +++ b/soc/nxp/imx/imx8m/m4_mini/pinctrl_soc.h @@ -19,8 +19,9 @@ extern "C" { #define MCUX_IMX_BIAS_PULL_UP_SHIFT IOMUXC_SW_PAD_CTL_PAD_PUE_SHIFT #define MCUX_IMX_BIAS_PULL_ENABLE_SHIFT IOMUXC_SW_PAD_CTL_PAD_PE_SHIFT #define MCUX_IMX_DRIVE_OPEN_DRAIN_SHIFT IOMUXC_SW_PAD_CTL_PAD_ODE_SHIFT -#define MCUX_IMX_SLEW_RATE_SHIFT IOMUXC_SW_PAD_CTL_PAD_FSEL_SHIFT -#define MCUX_IMX_DRIVE_STRENGTH_SHIFT IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT +/* fixed for DSE and FSEL for as there is one bit not used in these field */ +#define MCUX_IMX_SLEW_RATE_SHIFT (IOMUXC_SW_PAD_CTL_PAD_FSEL_SHIFT + 1) +#define MCUX_IMX_DRIVE_STRENGTH_SHIFT (IOMUXC_SW_PAD_CTL_PAD_DSE_SHIFT + 1) #define MCUX_IMX_INPUT_ENABLE_SHIFT 31 /* Shift to a bit not used by IOMUXC_SW_PAD_CTL */ #define MCUX_IMX_INPUT_ENABLE(x) ((x >> MCUX_IMX_INPUT_ENABLE_SHIFT) & 0x1)