drivers: pwm: stm32: add support for pinmux
Add support for DT based pinmux configurations. Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas
Kumar Gala
parent
aa45e0a90c
commit
af1b9442ca
2 changed files with 167 additions and 1 deletions
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@ -16,6 +16,7 @@
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#include <init.h>
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#include <init.h>
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#include <drivers/clock_control/stm32_clock_control.h>
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#include <drivers/clock_control/stm32_clock_control.h>
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#include <pinmux/stm32/pinmux_stm32.h>
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#include <logging/log.h>
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#include <logging/log.h>
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LOG_MODULE_REGISTER(pwm_stm32, CONFIG_PWM_LOG_LEVEL);
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LOG_MODULE_REGISTER(pwm_stm32, CONFIG_PWM_LOG_LEVEL);
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@ -34,6 +35,10 @@ struct pwm_stm32_config {
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uint32_t prescaler;
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uint32_t prescaler;
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/** Clock configuration. */
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/** Clock configuration. */
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struct stm32_pclken pclken;
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struct stm32_pclken pclken;
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/** pinctrl configurations. */
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const struct soc_gpio_pinctrl *pinctrl;
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/** Number of pinctrl configurations. */
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size_t pinctrl_len;
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};
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};
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/** Series F3, F7, G0, G4, H7, L4, MP1 and WB have up to 6 channels, others up
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/** Series F3, F7, G0, G4, H7, L4, MP1 and WB have up to 6 channels, others up
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@ -276,6 +281,153 @@ static int pwm_stm32_init(const struct device *dev)
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return r;
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return r;
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}
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}
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/* configure pinmux */
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if (cfg->pinctrl_len != 0U) {
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#if DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl)
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/* apply F1 series remaps */
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int remap;
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remap = stm32_dt_pinctrl_remap_check(cfg->pinctrl,
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cfg->pinctrl_len);
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if (remap < 0) {
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LOG_ERR("pinctrl remap check failed (%d)", remap);
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return remap;
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}
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LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
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switch ((uint32_t)cfg->timer) {
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers1), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers1)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial_TIM1();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM1();
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} else {
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LL_GPIO_AF_DisableRemap_TIM1();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers2), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers2)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial1_TIM2();
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} else if (remap == REMAP_2) {
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LL_GPIO_AF_RemapPartial2_TIM2();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM2();
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} else {
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LL_GPIO_AF_DisableRemap_TIM2();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers3), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers3)):
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if (remap == REMAP_1) {
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LL_GPIO_AF_RemapPartial_TIM3();
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} else if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM3();
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} else {
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LL_GPIO_AF_DisableRemap_TIM3();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers4), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers4)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM4();
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} else {
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LL_GPIO_AF_DisableRemap_TIM4();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers9), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers9)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM9();
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} else {
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LL_GPIO_AF_DisableRemap_TIM9();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers10), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers10)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM10();
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} else {
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LL_GPIO_AF_DisableRemap_TIM10();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers11), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers11)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM11();
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} else {
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LL_GPIO_AF_DisableRemap_TIM11();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers12), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers12)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM12();
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} else {
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LL_GPIO_AF_DisableRemap_TIM12();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers13), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers13)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM13();
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} else {
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LL_GPIO_AF_DisableRemap_TIM13();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers14), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers14)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM14();
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} else {
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LL_GPIO_AF_DisableRemap_TIM14();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers15), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers15)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM15();
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} else {
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LL_GPIO_AF_DisableRemap_TIM15();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers16), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers16)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM16();
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} else {
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LL_GPIO_AF_DisableRemap_TIM16();
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}
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break;
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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(timers17), okay)
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case DT_REG_ADDR(DT_NODELABEL(timers17)):
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if (remap == REMAP_FULL) {
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LL_GPIO_AF_EnableRemap_TIM17();
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} else {
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LL_GPIO_AF_DisableRemap_TIM17();
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}
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break;
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#endif
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}
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#endif /* DT_HAS_COMPAT_STATUS_OKAY(st_stm32f1_pinctrl) */
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stm32_dt_pinctrl_configure(cfg->pinctrl, cfg->pinctrl_len);
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}
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/* initialize timer */
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/* initialize timer */
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LL_TIM_StructInit(&init);
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LL_TIM_StructInit(&init);
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@ -308,11 +460,16 @@ static int pwm_stm32_init(const struct device *dev)
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#define PWM_DEVICE_INIT(index) \
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#define PWM_DEVICE_INIT(index) \
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static struct pwm_stm32_data pwm_stm32_data_##index; \
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static struct pwm_stm32_data pwm_stm32_data_##index; \
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\
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\
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static const struct soc_gpio_pinctrl pwm_pins_##index[] = \
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ST_STM32_DT_PINCTRL(0, index); \
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\
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static const struct pwm_stm32_config pwm_stm32_config_##index = { \
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static const struct pwm_stm32_config pwm_stm32_config_##index = { \
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.timer = (TIM_TypeDef *)DT_REG_ADDR( \
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.timer = (TIM_TypeDef *)DT_REG_ADDR( \
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DT_INST(index, st_stm32_timers)), \
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DT_INST(index, st_stm32_timers)), \
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.prescaler = DT_INST_PROP(index, st_prescaler), \
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.prescaler = DT_INST_PROP(index, st_prescaler), \
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.pclken = DT_INST_CLK(index, timer) \
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.pclken = DT_INST_CLK(index, timer), \
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.pinctrl = pwm_pins_##index, \
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.pinctrl_len = ARRAY_SIZE(pwm_pins_##index), \
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}; \
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}; \
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\
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\
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DEVICE_AND_API_INIT(pwm_stm32_##index, DT_INST_LABEL(index), \
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DEVICE_AND_API_INIT(pwm_stm32_##index, DT_INST_LABEL(index), \
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@ -13,6 +13,15 @@ properties:
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required: true
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required: true
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description: Clock prescaler at the input of the timer
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description: Clock prescaler at the input of the timer
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pinctrl-0:
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type: phandles
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required: false
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description: |
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GPIO pin configuration for PWM signal/s. We expect that the phandles
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will reference pinctrl nodes, e.g.
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pinctrl-0 = <&tim1_ch1_pwm_pa8 &tim1_ch2_pwm_pa9>;
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"#pwm-cells":
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"#pwm-cells":
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const: 3
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const: 3
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