boards: Enable USDHC driver for all RT10xx based boards
Enable new USDHC driver for all RT10xx boards, since those will have the SDHC driver selected by Kconfig Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
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a79f485487
commit
aef290bb4d
12 changed files with 62 additions and 13 deletions
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@ -178,13 +178,19 @@ zephyr_udc0: &usb1 {
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&usdhc1 {
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status = "okay";
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cd-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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pinctrl-0 = <&pinmux_usdhc1>;
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pinctrl-1 = <&pinmux_usdhc1_slow>;
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
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pwr-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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&adc1 {
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@ -24,3 +24,4 @@ supported:
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- spi
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- usb_device
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- adc
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- sdhc
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@ -166,3 +166,20 @@
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zephyr_udc0: &usb1 {
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status = "okay";
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};
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&usdhc1 {
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status = "okay";
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pinctrl-0 = <&pinmux_usdhc1>;
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pinctrl-1 = <&pinmux_usdhc1_slow>;
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
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pwr-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
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no-1-8-v;
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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@ -21,5 +21,6 @@ supported:
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- netif:eth
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- watchdog
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- spi
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- sdhc
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- adc
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- usb_device
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@ -258,7 +258,6 @@ zephyr_udc0: &usb1 {
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&usdhc1 {
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status = "okay";
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no-1-8-v;
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pwr-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&pinmux_usdhc1>;
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@ -266,6 +265,11 @@ zephyr_udc0: &usb1 {
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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&wdog0 {
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@ -217,15 +217,20 @@ zephyr_udc0: &usb1 {
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&usdhc1 {
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status = "okay";
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power-delay-ms = <1000>;
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pwr-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
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no-1-8-v;
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status = "okay";
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pinctrl-0 = <&pinmux_usdhc1>;
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pinctrl-1 = <&pinmux_usdhc1_slow>;
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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&edma0 {
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@ -15,9 +15,6 @@ endchoice
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config DISK_DRIVER_SDMMC
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default y if DISK_DRIVERS
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config IMX_USDHC
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default y if SDHC
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config FLASH_MCUX_FLEXSPI_NOR
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default y if FLASH
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@ -286,14 +286,18 @@ zephyr_udc0: &usb1 {
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&usdhc1 {
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status = "okay";
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no-1-8-v;
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pwr-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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pwr-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>;
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cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&pinmux_usdhc1>;
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pinctrl-1 = <&pinmux_usdhc1_slow>;
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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&edma0 {
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@ -184,6 +184,11 @@
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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&csi {
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@ -28,5 +28,14 @@
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&usdhc1 {
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status = "okay";
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no-1-8-v;
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detect-dat3;
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pinctrl-0 = <&pinmux_usdhc1>;
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pinctrl-1 = <&pinmux_usdhc1_slow>;
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pinctrl-2 = <&pinmux_usdhc1_med>;
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pinctrl-3 = <&pinmux_usdhc1_fast>;
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pinctrl-names = "default", "slow", "med", "fast";
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mmc {
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compatible = "zephyr,sdmmc-disk";
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status = "okay";
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label = "SDMMC_0";
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};
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};
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@ -56,6 +56,10 @@ config UART_MCUX_LPUART
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default y if HAS_MCUX_LPUART
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depends on SERIAL
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config IMX_USDHC
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default y if (HAS_MCUX_USDHC1 || HAS_MCUX_USDHC2)
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depends on SDHC
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if FLASH_MCUX_FLEXSPI_XIP
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# Avoid RWW hazards by defaulting logging to disabled
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@ -24,8 +24,6 @@ config SOC_MIMXRT1011
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select CPU_HAS_ARM_MPU
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select INIT_ENET_PLL
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select HAS_MCUX_USB_EHCI
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select HAS_MCUX_USDHC1
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select HAS_MCUX_USDHC2
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select HAS_MCUX_EDMA
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select HAS_MCUX_GPC
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select HAS_MCUX_DCDC
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@ -49,8 +47,6 @@ config SOC_MIMXRT1015
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select CPU_HAS_ARM_MPU
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select INIT_ENET_PLL
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select HAS_MCUX_USB_EHCI
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select HAS_MCUX_USDHC1
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select HAS_MCUX_USDHC2
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select HAS_MCUX_EDMA
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select HAS_MCUX_GPC
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select HAS_MCUX_DCDC
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