diff --git a/drivers/gpio/gpio_andes_atcgpio100.c b/drivers/gpio/gpio_andes_atcgpio100.c
index 40444489922..f1c7875a0ac 100644
--- a/drivers/gpio/gpio_andes_atcgpio100.c
+++ b/drivers/gpio/gpio_andes_atcgpio100.c
@@ -51,26 +51,22 @@
 #define DEBOUNCE_CONFIGURED     BIT(29)
 #define DF_DEBOUNCED_SETTING    (0x80000003)
 
-#define DEV_CFG(dev) \
-	((const struct gpio_atcgpio100_config * const)(dev)->config)
+#define GPIO_BASE(dev) \
+	((const struct gpio_atcgpio100_config * const)(dev)->config)->base
 
-#define DEV_DATA(dev) \
-	((struct gpio_atcgpio100_data *)(dev)->data)
-
-
-#define GPIO_CFG(dev)  (DEV_CFG(dev)->base + REG_CFG)
-#define GPIO_DIR(dev)  (DEV_CFG(dev)->base + REG_DIR)
-#define GPIO_DIN(dev)  (DEV_CFG(dev)->base + REG_DIN)
-#define GPIO_DOUT(dev) (DEV_CFG(dev)->base + REG_DOUT)
-#define GPIO_DCLR(dev) (DEV_CFG(dev)->base + REG_DCLR)
-#define GPIO_DSET(dev) (DEV_CFG(dev)->base + REG_DSET)
-#define GPIO_PUEN(dev) (DEV_CFG(dev)->base + REG_PUEN)
-#define GPIO_PTYP(dev) (DEV_CFG(dev)->base + REG_PTYP)
-#define GPIO_INTE(dev) (DEV_CFG(dev)->base + REG_INTE)
-#define GPIO_IMD(dev, idx) (DEV_CFG(dev)->base + REG_IMD0 + (idx * 4))
-#define GPIO_ISTA(dev) (DEV_CFG(dev)->base + REG_ISTA)
-#define GPIO_DEBE(dev) (DEV_CFG(dev)->base + REG_DEBE)
-#define GPIO_DEBC(dev) (DEV_CFG(dev)->base + REG_DEBC)
+#define GPIO_CFG(dev)  (GPIO_BASE(dev) + REG_CFG)
+#define GPIO_DIR(dev)  (GPIO_BASE(dev) + REG_DIR)
+#define GPIO_DIN(dev)  (GPIO_BASE(dev) + REG_DIN)
+#define GPIO_DOUT(dev) (GPIO_BASE(dev) + REG_DOUT)
+#define GPIO_DCLR(dev) (GPIO_BASE(dev) + REG_DCLR)
+#define GPIO_DSET(dev) (GPIO_BASE(dev) + REG_DSET)
+#define GPIO_PUEN(dev) (GPIO_BASE(dev) + REG_PUEN)
+#define GPIO_PTYP(dev) (GPIO_BASE(dev) + REG_PTYP)
+#define GPIO_INTE(dev) (GPIO_BASE(dev) + REG_INTE)
+#define GPIO_IMD(dev, idx) (GPIO_BASE(dev) + REG_IMD0 + (idx * 4))
+#define GPIO_ISTA(dev) (GPIO_BASE(dev) + REG_ISTA)
+#define GPIO_DEBE(dev) (GPIO_BASE(dev) + REG_DEBE)
+#define GPIO_DEBC(dev) (GPIO_BASE(dev) + REG_DEBC)
 
 #define INWORD(x)     sys_read32(x)
 #define OUTWORD(x, d) sys_write32(d, x)
@@ -104,7 +100,7 @@ static int gpio_atcgpio100_config(const struct device *port,
 				  gpio_pin_t pin,
 				  gpio_flags_t flags)
 {
-	struct gpio_atcgpio100_data * const data = DEV_DATA(port);
+	struct gpio_atcgpio100_data * const data = port->data;
 	uint32_t port_value, pin_mask, io_flags;
 	k_spinlock_key_t key;
 
@@ -177,7 +173,7 @@ static int gpio_atcgpio100_set_masked_raw(const struct device *port,
 					  gpio_port_pins_t mask,
 					  gpio_port_value_t value)
 {
-	struct gpio_atcgpio100_data * const data = DEV_DATA(port);
+	struct gpio_atcgpio100_data * const data = port->data;
 	uint32_t port_value;
 
 	k_spinlock_key_t key = k_spin_lock(&data->lock);
@@ -207,7 +203,7 @@ static int gpio_atcgpio100_clear_bits_raw(const struct device *port,
 static int gpio_atcgpio100_toggle_bits(const struct device *port,
 					gpio_port_pins_t pins)
 {
-	struct gpio_atcgpio100_data * const data = DEV_DATA(port);
+	struct gpio_atcgpio100_data * const data = port->data;
 	uint32_t port_value;
 
 	k_spinlock_key_t key = k_spin_lock(&data->lock);
@@ -226,7 +222,7 @@ static int gpio_atcgpio100_pin_interrupt_configure(
 					enum gpio_int_mode mode,
 					enum gpio_int_trig trig)
 {
-	struct gpio_atcgpio100_data * const data = DEV_DATA(port);
+	struct gpio_atcgpio100_data * const data = port->data;
 	uint32_t port_value, int_mode, imr_idx, ch_idx;
 	k_spinlock_key_t key;
 
@@ -285,14 +281,14 @@ static int gpio_atcgpio100_manage_callback(const struct device *port,
 					bool set)
 {
 
-	struct gpio_atcgpio100_data * const data = DEV_DATA(port);
+	struct gpio_atcgpio100_data * const data = port->data;
 
 	return gpio_manage_callback(&data->cb, callback, set);
 }
 
 static void gpio_atcgpio100_irq_handler(const struct device *port)
 {
-	struct gpio_atcgpio100_data * const data = DEV_DATA(port);
+	struct gpio_atcgpio100_data * const data = port->data;
 	uint32_t port_value;
 
 	port_value = INWORD(GPIO_ISTA(port));
@@ -315,7 +311,7 @@ static const struct gpio_driver_api gpio_atcgpio100_api = {
 
 static int gpio_atcgpio100_init(const struct device *port)
 {
-	const struct gpio_atcgpio100_config * const dev_cfg = DEV_CFG(port);
+	const struct gpio_atcgpio100_config * const dev_cfg = port->config;
 
 	/* Disable all interrupts */
 	OUTWORD(GPIO_INTE(port), BIT_MASK(0));
diff --git a/drivers/gpio/gpio_b91.c b/drivers/gpio/gpio_b91.c
index fde76b5de90..954424b83c5 100644
--- a/drivers/gpio/gpio_b91.c
+++ b/drivers/gpio/gpio_b91.c
@@ -18,9 +18,6 @@
 #define GET_GPIO(dev)           ((volatile struct gpio_b91_t *)	\
 				 ((const struct gpio_b91_config *)dev->config)->gpio_base)
 
-/* Get GPIO configuration */
-#define GET_CFG(dev)            ((const struct gpio_b91_config *)dev->config)
-
 /* Get GPIO IRQ number defined in dts */
 #define GET_IRQ_NUM(dev)        (((const struct gpio_b91_config *)dev->config)->irq_num)
 
@@ -298,7 +295,7 @@ static void gpio_b91_config_in_out(volatile struct gpio_b91_t *gpio,
 /* GPIO driver initialization */
 static int gpio_b91_init(const struct device *dev)
 {
-	const struct gpio_b91_config *cfg = GET_CFG(dev);
+	const struct gpio_b91_config *cfg = dev->config;
 
 	cfg->pirq_connect();
 
diff --git a/drivers/gpio/gpio_cc32xx.c b/drivers/gpio/gpio_cc32xx.c
index 8d6d074731c..d276f922c48 100644
--- a/drivers/gpio/gpio_cc32xx.c
+++ b/drivers/gpio/gpio_cc32xx.c
@@ -59,11 +59,6 @@ struct gpio_cc32xx_data {
 	sys_slist_t callbacks;
 };
 
-#define DEV_CFG(dev) \
-	((const struct gpio_cc32xx_config *)(dev)->config)
-#define DEV_DATA(dev) \
-	((struct gpio_cc32xx_data *)(dev)->data)
-
 static int gpio_cc32xx_port_set_bits_raw(const struct device *port,
 					 uint32_t mask);
 static int gpio_cc32xx_port_clear_bits_raw(const struct device *port,
@@ -73,7 +68,7 @@ static inline int gpio_cc32xx_config(const struct device *port,
 				     gpio_pin_t pin,
 				     gpio_flags_t flags)
 {
-	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
+	const struct gpio_cc32xx_config *gpio_config = port->config;
 	unsigned long port_base = gpio_config->port_base;
 
 	if (((flags & GPIO_INPUT) != 0) && ((flags & GPIO_OUTPUT) != 0)) {
@@ -107,7 +102,7 @@ static inline int gpio_cc32xx_config(const struct device *port,
 static int gpio_cc32xx_port_get_raw(const struct device *port,
 				    uint32_t *value)
 {
-	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
+	const struct gpio_cc32xx_config *gpio_config = port->config;
 	unsigned long port_base = gpio_config->port_base;
 	unsigned char pin_packed = 0xFF;
 
@@ -120,7 +115,7 @@ static int gpio_cc32xx_port_set_masked_raw(const struct device *port,
 					   uint32_t mask,
 					   uint32_t value)
 {
-	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
+	const struct gpio_cc32xx_config *gpio_config = port->config;
 	unsigned long port_base = gpio_config->port_base;
 
 	MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)value);
@@ -131,7 +126,7 @@ static int gpio_cc32xx_port_set_masked_raw(const struct device *port,
 static int gpio_cc32xx_port_set_bits_raw(const struct device *port,
 					 uint32_t mask)
 {
-	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
+	const struct gpio_cc32xx_config *gpio_config = port->config;
 	unsigned long port_base = gpio_config->port_base;
 
 	MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)mask);
@@ -142,7 +137,7 @@ static int gpio_cc32xx_port_set_bits_raw(const struct device *port,
 static int gpio_cc32xx_port_clear_bits_raw(const struct device *port,
 					   uint32_t mask)
 {
-	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
+	const struct gpio_cc32xx_config *gpio_config = port->config;
 	unsigned long port_base = gpio_config->port_base;
 
 	MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)~mask);
@@ -153,7 +148,7 @@ static int gpio_cc32xx_port_clear_bits_raw(const struct device *port,
 static int gpio_cc32xx_port_toggle_bits(const struct device *port,
 					uint32_t mask)
 {
-	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
+	const struct gpio_cc32xx_config *gpio_config = port->config;
 	unsigned long port_base = gpio_config->port_base;
 	long value;
 
@@ -170,7 +165,7 @@ static int gpio_cc32xx_pin_interrupt_configure(const struct device *port,
 					       enum gpio_int_mode mode,
 					       enum gpio_int_trig trig)
 {
-	const struct gpio_cc32xx_config *gpio_config = DEV_CFG(port);
+	const struct gpio_cc32xx_config *gpio_config = port->config;
 	unsigned long port_base = gpio_config->port_base;
 	unsigned long int_type;
 
@@ -212,15 +207,15 @@ static int gpio_cc32xx_manage_callback(const struct device *dev,
 				       struct gpio_callback *callback,
 				       bool set)
 {
-	struct gpio_cc32xx_data *data = DEV_DATA(dev);
+	struct gpio_cc32xx_data *data = dev->data;
 
 	return gpio_manage_callback(&data->callbacks, callback, set);
 }
 
 static void gpio_cc32xx_port_isr(const struct device *dev)
 {
-	const struct gpio_cc32xx_config *config = DEV_CFG(dev);
-	struct gpio_cc32xx_data *data = DEV_DATA(dev);
+	const struct gpio_cc32xx_config *config = dev->config;
+	struct gpio_cc32xx_data *data = dev->data;
 	uint32_t int_status;
 
 	/* See which interrupts triggered: */
diff --git a/drivers/gpio/gpio_esp32.c b/drivers/gpio/gpio_esp32.c
index 9a476caada8..23463a6312e 100644
--- a/drivers/gpio/gpio_esp32.c
+++ b/drivers/gpio/gpio_esp32.c
@@ -33,8 +33,6 @@
 #include <logging/log.h>
 LOG_MODULE_REGISTER(gpio_esp32, CONFIG_LOG_DEFAULT_LEVEL);
 
-#define DEV_CFG(_dev) ((struct gpio_esp32_config *const)(_dev)->config)
-
 #ifdef CONFIG_SOC_ESP32C3
 /* gpio structs in esp32c3 series are different from xtensa ones */
 #define out out.data
@@ -91,7 +89,7 @@ static int gpio_esp32_config(const struct device *dev,
 			     gpio_pin_t pin,
 			     gpio_flags_t flags)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(dev);
+	struct gpio_esp32_config *const cfg = dev->config;
 	struct gpio_esp32_data *data = dev->data;
 	uint32_t io_pin = (uint32_t) pin;
 	uint32_t key;
@@ -208,7 +206,7 @@ end:
 
 static int gpio_esp32_port_get_raw(const struct device *port, uint32_t *value)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(port);
+	struct gpio_esp32_config *const cfg = port->config;
 
 	if (cfg->gpio_port == 0) {
 		*value = cfg->gpio_dev->in;
@@ -224,7 +222,7 @@ static int gpio_esp32_port_get_raw(const struct device *port, uint32_t *value)
 static int gpio_esp32_port_set_masked_raw(const struct device *port,
 					  uint32_t mask, uint32_t value)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(port);
+	struct gpio_esp32_config *const cfg = port->config;
 
 	uint32_t key = irq_lock();
 
@@ -244,7 +242,7 @@ static int gpio_esp32_port_set_masked_raw(const struct device *port,
 static int gpio_esp32_port_set_bits_raw(const struct device *port,
 					uint32_t pins)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(port);
+	struct gpio_esp32_config *const cfg = port->config;
 
 	if (cfg->gpio_port == 0) {
 		cfg->gpio_dev->out_w1ts = pins;
@@ -260,7 +258,7 @@ static int gpio_esp32_port_set_bits_raw(const struct device *port,
 static int gpio_esp32_port_clear_bits_raw(const struct device *port,
 					  uint32_t pins)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(port);
+	struct gpio_esp32_config *const cfg = port->config;
 
 	if (cfg->gpio_port == 0) {
 		cfg->gpio_dev->out_w1tc = pins;
@@ -276,7 +274,7 @@ static int gpio_esp32_port_clear_bits_raw(const struct device *port,
 static int gpio_esp32_port_toggle_bits(const struct device *port,
 				       uint32_t pins)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(port);
+	struct gpio_esp32_config *const cfg = port->config;
 	uint32_t key = irq_lock();
 
 	if (cfg->gpio_port == 0) {
@@ -330,7 +328,7 @@ static int gpio_esp32_pin_interrupt_configure(const struct device *port,
 					      enum gpio_int_mode mode,
 					      enum gpio_int_trig trig)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(port);
+	struct gpio_esp32_config *const cfg = port->config;
 	uint32_t io_pin = (uint32_t) pin;
 	int intr_trig_mode = convert_int_type(mode, trig);
 	uint32_t key;
@@ -358,7 +356,7 @@ static int gpio_esp32_manage_callback(const struct device *dev,
 
 static uint32_t gpio_esp32_get_pending_int(const struct device *dev)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(dev);
+	struct gpio_esp32_config *const cfg = dev->config;
 	uint32_t irq_status;
 	uint32_t const core_id = CPU_ID();
 
@@ -373,7 +371,7 @@ static uint32_t gpio_esp32_get_pending_int(const struct device *dev)
 
 static void IRAM_ATTR gpio_esp32_fire_callbacks(const struct device *dev)
 {
-	struct gpio_esp32_config *const cfg = DEV_CFG(dev);
+	struct gpio_esp32_config *const cfg = dev->config;
 	struct gpio_esp32_data *data = dev->data;
 	uint32_t irq_status;
 	uint32_t const core_id = CPU_ID();
diff --git a/drivers/gpio/gpio_lpc11u6x.c b/drivers/gpio/gpio_lpc11u6x.c
index 769836add5c..6d5ddf1d26d 100644
--- a/drivers/gpio/gpio_lpc11u6x.c
+++ b/drivers/gpio/gpio_lpc11u6x.c
@@ -23,11 +23,6 @@
 
 #include "gpio_utils.h"
 
-#define DEV_CFG(dev)  ((const struct gpio_lpc11u6x_config *) \
-		       ((dev)->config))
-#define DEV_DATA(dev) ((struct gpio_lpc11u6x_data *) \
-		       ((dev)->data))
-
 /* Offset from syscon base address. */
 #define LPC11U6X_PINTSEL_REGS	0x178
 
@@ -110,8 +105,8 @@ struct gpio_lpc11u6x_data {
 static int gpio_lpc11u6x_pin_configure(const struct device *port,
 				       gpio_pin_t pin, gpio_flags_t flags)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(port);
-	struct gpio_lpc11u6x_data *data = DEV_DATA(port);
+	const struct gpio_lpc11u6x_config *config = port->config;
+	struct gpio_lpc11u6x_data *data = port->data;
 	struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
 		(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
 	uint8_t port_num = config->port_num;
@@ -187,7 +182,7 @@ static int gpio_lpc11u6x_pin_configure(const struct device *port,
 static int gpio_lpc11u6x_port_get_raw(const struct device *port,
 				      gpio_port_value_t *value)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(port);
+	const struct gpio_lpc11u6x_config *config = port->config;
 	struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
 		(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
 
@@ -200,7 +195,7 @@ static int gpio_lpc11u6x_port_set_masked_raw(const struct device *port,
 					     gpio_port_pins_t mask,
 					     gpio_port_value_t value)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(port);
+	const struct gpio_lpc11u6x_config *config = port->config;
 	struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
 		(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
 	uint8_t port_num = config->port_num;
@@ -223,7 +218,7 @@ static int gpio_lpc11u6x_port_set_masked_raw(const struct device *port,
 static int gpio_lpc11u6x_port_set_bits_raw(const struct device *port,
 					   gpio_port_pins_t pins)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(port);
+	const struct gpio_lpc11u6x_config *config = port->config;
 	struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
 		(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
 
@@ -235,7 +230,7 @@ static int gpio_lpc11u6x_port_set_bits_raw(const struct device *port,
 static int gpio_lpc11u6x_port_clear_bits_raw(const struct device *port,
 					     gpio_port_pins_t pins)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(port);
+	const struct gpio_lpc11u6x_config *config = port->config;
 	struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
 		(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
 
@@ -247,7 +242,7 @@ static int gpio_lpc11u6x_port_clear_bits_raw(const struct device *port,
 static int gpio_lpc11u6x_port_toggle_bits(const struct device *port,
 					  gpio_port_pins_t pins)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(port);
+	const struct gpio_lpc11u6x_config *config = port->config;
 	struct lpc11u6x_gpio_regs *gpio_regs = (struct lpc11u6x_gpio_regs *)
 		(config->shared->gpio_base + LPC11U6X_GPIO_REGS);
 
@@ -323,7 +318,7 @@ static int gpio_lpc11u6x_pin_interrupt_configure(const struct device *port,
 						 enum gpio_int_mode mode,
 						 enum gpio_int_trig trig)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(port);
+	const struct gpio_lpc11u6x_config *config = port->config;
 	struct lpc11u6x_pint_regs *pint_regs = (struct lpc11u6x_pint_regs *)
 		(config->shared->gpio_base + LPC11U6X_PINT_REGS);
 	uint8_t intpin;
@@ -406,7 +401,7 @@ static int gpio_lpc11u6x_pin_interrupt_configure(const struct device *port,
 static int gpio_lpc11u6x_manage_callback(const struct device *port,
 					 struct gpio_callback *cb, bool set)
 {
-	struct gpio_lpc11u6x_data *data = DEV_DATA(port);
+	struct gpio_lpc11u6x_data *data = port->data;
 
 	return gpio_manage_callback(&data->cb_list, cb, set);
 }
@@ -515,8 +510,8 @@ do {							                \
 
 static int gpio_lpc11u6x_init(const struct device *dev)
 {
-	const struct gpio_lpc11u6x_config *config = DEV_CFG(dev);
-	struct gpio_lpc11u6x_data *data = DEV_DATA(dev);
+	const struct gpio_lpc11u6x_config *config = dev->config;
+	struct gpio_lpc11u6x_data *data = dev->data;
 	const struct device *clock_dev;
 	int ret;
 	static bool gpio_ready;
diff --git a/drivers/gpio/gpio_psoc6.c b/drivers/gpio/gpio_psoc6.c
index f5042793117..e31a0b3f937 100644
--- a/drivers/gpio/gpio_psoc6.c
+++ b/drivers/gpio/gpio_psoc6.c
@@ -37,16 +37,11 @@ struct gpio_psoc6_runtime {
 	sys_slist_t cb;
 };
 
-#define DEV_CFG(dev) \
-	((const struct gpio_psoc6_config * const)(dev)->config)
-#define DEV_DATA(dev) \
-	((struct gpio_psoc6_runtime * const)(dev)->data)
-
 static int gpio_psoc6_config(const struct device *dev,
 			     gpio_pin_t pin,
 			     gpio_flags_t flags)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 	uint32_t drv_mode;
 	uint32_t pin_val;
@@ -96,7 +91,7 @@ static int gpio_psoc6_config(const struct device *dev,
 static int gpio_psoc6_port_get_raw(const struct device *dev,
 				   uint32_t *value)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 
 	*value = GPIO_PRT_IN(port);
@@ -110,7 +105,7 @@ static int gpio_psoc6_port_set_masked_raw(const struct device *dev,
 					  uint32_t mask,
 					  uint32_t value)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 
 	GPIO_PRT_OUT(port) = (GPIO_PRT_IN(port) & ~mask) | (mask & value);
@@ -121,7 +116,7 @@ static int gpio_psoc6_port_set_masked_raw(const struct device *dev,
 static int gpio_psoc6_port_set_bits_raw(const struct device *dev,
 					uint32_t mask)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 
 	GPIO_PRT_OUT_SET(port) = mask;
@@ -132,7 +127,7 @@ static int gpio_psoc6_port_set_bits_raw(const struct device *dev,
 static int gpio_psoc6_port_clear_bits_raw(const struct device *dev,
 					  uint32_t mask)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 
 	GPIO_PRT_OUT_CLR(port) = mask;
@@ -143,7 +138,7 @@ static int gpio_psoc6_port_clear_bits_raw(const struct device *dev,
 static int gpio_psoc6_port_toggle_bits(const struct device *dev,
 				       uint32_t mask)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 
 	GPIO_PRT_OUT_INV(port) = mask;
@@ -156,7 +151,7 @@ static int gpio_psoc6_pin_interrupt_configure(const struct device *dev,
 					    enum gpio_int_mode mode,
 					    enum gpio_int_trig trig)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 	uint32_t is_enabled = ((mode == GPIO_INT_MODE_DISABLED) ? 0 : 1);
 	uint32_t lv_trg = CY_GPIO_INTR_DISABLE;
@@ -194,7 +189,7 @@ static int gpio_psoc6_pin_interrupt_configure(const struct device *dev,
 
 static void gpio_psoc6_isr(const struct device *dev)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 	struct gpio_psoc6_runtime *context = dev->data;
 	uint32_t int_stat;
@@ -224,7 +219,7 @@ static int gpio_psoc6_manage_callback(const struct device *port,
 
 static uint32_t gpio_psoc6_get_pending_int(const struct device *dev)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 	GPIO_PRT_Type * const port = cfg->regs;
 
 	LOG_DBG("Pending: 0x%08x", GPIO_PRT_INTR_MASKED(port));
@@ -246,7 +241,7 @@ static const struct gpio_driver_api gpio_psoc6_api = {
 
 int gpio_psoc6_init(const struct device *dev)
 {
-	const struct gpio_psoc6_config * const cfg = DEV_CFG(dev);
+	const struct gpio_psoc6_config * const cfg = dev->config;
 
 	cfg->config_func(dev);
 
diff --git a/drivers/gpio/gpio_sam.c b/drivers/gpio/gpio_sam.c
index b1b1353ca0c..c083f3c202a 100644
--- a/drivers/gpio/gpio_sam.c
+++ b/drivers/gpio/gpio_sam.c
@@ -31,17 +31,12 @@ struct gpio_sam_runtime {
 	sys_slist_t cb;
 };
 
-#define DEV_CFG(dev) \
-	((const struct gpio_sam_config * const)(dev)->config)
-#define DEV_DATA(dev) \
-	((struct gpio_sam_runtime * const)(dev)->data)
-
 #define GPIO_SAM_ALL_PINS    0xFFFFFFFF
 
 static int gpio_sam_port_configure(const struct device *dev, uint32_t mask,
 				   gpio_flags_t flags)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 
 	if (flags & GPIO_SINGLE_ENDED) {
@@ -153,7 +148,7 @@ static int gpio_sam_config(const struct device *dev, gpio_pin_t pin,
 
 static int gpio_sam_port_get_raw(const struct device *dev, uint32_t *value)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 
 	*value = pio->PIO_PDSR;
@@ -165,7 +160,7 @@ static int gpio_sam_port_set_masked_raw(const struct device *dev,
 					uint32_t mask,
 					uint32_t value)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 
 	pio->PIO_ODSR = (pio->PIO_ODSR & ~mask) | (mask & value);
@@ -175,7 +170,7 @@ static int gpio_sam_port_set_masked_raw(const struct device *dev,
 
 static int gpio_sam_port_set_bits_raw(const struct device *dev, uint32_t mask)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 
 	/* Set pins. */
@@ -187,7 +182,7 @@ static int gpio_sam_port_set_bits_raw(const struct device *dev, uint32_t mask)
 static int gpio_sam_port_clear_bits_raw(const struct device *dev,
 					uint32_t mask)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 
 	/* Clear pins. */
@@ -198,7 +193,7 @@ static int gpio_sam_port_clear_bits_raw(const struct device *dev,
 
 static int gpio_sam_port_toggle_bits(const struct device *dev, uint32_t mask)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 
 	/* Toggle pins. */
@@ -212,7 +207,7 @@ static int gpio_sam_port_interrupt_configure(const struct device *dev,
 					     enum gpio_int_mode mode,
 					     enum gpio_int_trig trig)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 
 	/* Disable the interrupt. */
@@ -266,7 +261,7 @@ static int gpio_sam_pin_interrupt_configure(const struct device *dev,
 
 static void gpio_sam_isr(const struct device *dev)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Pio * const pio = cfg->regs;
 	struct gpio_sam_runtime *context = dev->data;
 	uint32_t int_stat;
@@ -298,7 +293,7 @@ static const struct gpio_driver_api gpio_sam_api = {
 
 int gpio_sam_init(const struct device *dev)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 
 	/* The peripheral clock must be enabled for the interrupts to work. */
 	soc_pmc_peripheral_enable(cfg->periph_id);
diff --git a/drivers/gpio/gpio_sam0.c b/drivers/gpio/gpio_sam0.c
index c6d3ce9b14b..2dfedde6af8 100644
--- a/drivers/gpio/gpio_sam0.c
+++ b/drivers/gpio/gpio_sam0.c
@@ -38,11 +38,6 @@ struct gpio_sam0_data {
 #endif
 };
 
-#define DEV_CFG(dev) \
-	((const struct gpio_sam0_config *const)(dev)->config)
-#define DEV_DATA(dev) \
-	((struct gpio_sam0_data *const)(dev)->data)
-
 #ifdef CONFIG_SAM0_EIC
 static void gpio_sam0_isr(uint32_t pins, void *arg)
 {
@@ -55,7 +50,8 @@ static void gpio_sam0_isr(uint32_t pins, void *arg)
 static int gpio_sam0_config(const struct device *dev, gpio_pin_t pin,
 			    gpio_flags_t flags)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
+	const struct gpio_sam0_config *config = dev->config;
+	struct gpio_sam0_data *data = dev->data;
 	PortGroup *regs = config->regs;
 	PORT_PINCFG_Type pincfg = {
 		.reg = 0,
@@ -97,7 +93,7 @@ static int gpio_sam0_config(const struct device *dev, gpio_pin_t pin,
 	}
 
 	/* Preserve debounce flag for interrupt configuration. */
-	WRITE_BIT(DEV_DATA(dev)->debounce, pin,
+	WRITE_BIT(data->debounce, pin,
 		  ((flags & GPIO_INT_DEBOUNCE) != 0)
 		  && (pincfg.bit.INEN != 0));
 
@@ -110,7 +106,7 @@ static int gpio_sam0_config(const struct device *dev, gpio_pin_t pin,
 static int gpio_sam0_port_get_raw(const struct device *dev,
 				  gpio_port_value_t *value)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
+	const struct gpio_sam0_config *config = dev->config;
 
 	*value = config->regs->IN.reg;
 
@@ -121,7 +117,7 @@ static int gpio_sam0_port_set_masked_raw(const struct device *dev,
 					 gpio_port_pins_t mask,
 					 gpio_port_value_t value)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
+	const struct gpio_sam0_config *config = dev->config;
 	uint32_t out = config->regs->OUT.reg;
 
 	config->regs->OUT.reg = (out & ~mask) | (value & mask);
@@ -132,7 +128,7 @@ static int gpio_sam0_port_set_masked_raw(const struct device *dev,
 static int gpio_sam0_port_set_bits_raw(const struct device *dev,
 				       gpio_port_pins_t pins)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
+	const struct gpio_sam0_config *config = dev->config;
 
 	config->regs->OUTSET.reg = pins;
 
@@ -142,7 +138,7 @@ static int gpio_sam0_port_set_bits_raw(const struct device *dev,
 static int gpio_sam0_port_clear_bits_raw(const struct device *dev,
 					 gpio_port_pins_t pins)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
+	const struct gpio_sam0_config *config = dev->config;
 
 	config->regs->OUTCLR.reg = pins;
 
@@ -152,7 +148,7 @@ static int gpio_sam0_port_clear_bits_raw(const struct device *dev,
 static int gpio_sam0_port_toggle_bits(const struct device *dev,
 				      gpio_port_pins_t pins)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
+	const struct gpio_sam0_config *config = dev->config;
 
 	config->regs->OUTTGL.reg = pins;
 
@@ -166,8 +162,8 @@ static int gpio_sam0_pin_interrupt_configure(const struct device *dev,
 					     enum gpio_int_mode mode,
 					     enum gpio_int_trig trig)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
-	struct gpio_sam0_data *const data = DEV_DATA(dev);
+	const struct gpio_sam0_config *config = dev->config;
+	struct gpio_sam0_data *const data = dev->data;
 	PortGroup *regs = config->regs;
 	PORT_PINCFG_Type pincfg = {
 		.reg = regs->PINCFG[pin].reg,
@@ -233,7 +229,7 @@ static int gpio_sam0_pin_interrupt_configure(const struct device *dev,
 
 		if (rc == 0) {
 			rc = sam0_eic_acquire(config->id, pin, trigger,
-					      (DEV_DATA(dev)->debounce & BIT(pin)) != 0,
+					      (data->debounce & BIT(pin)) != 0,
 					      gpio_sam0_isr, data);
 		}
 		if (rc == 0) {
@@ -258,14 +254,14 @@ static int gpio_sam0_pin_interrupt_configure(const struct device *dev,
 static int gpio_sam0_manage_callback(const struct device *dev,
 				     struct gpio_callback *callback, bool set)
 {
-	struct gpio_sam0_data *const data = DEV_DATA(dev);
+	struct gpio_sam0_data *const data = dev->data;
 
 	return gpio_manage_callback(&data->callbacks, callback, set);
 }
 
 static uint32_t gpio_sam0_get_pending_int(const struct device *dev)
 {
-	const struct gpio_sam0_config *config = DEV_CFG(dev);
+	const struct gpio_sam0_config *config = dev->config;
 
 	return sam0_eic_interrupt_pending(config->id);
 }
diff --git a/drivers/gpio/gpio_sam4l.c b/drivers/gpio/gpio_sam4l.c
index 0e05bc3c7ab..39142bc2d8b 100644
--- a/drivers/gpio/gpio_sam4l.c
+++ b/drivers/gpio/gpio_sam4l.c
@@ -32,18 +32,13 @@ struct gpio_sam_runtime {
 	sys_slist_t cb;
 };
 
-#define DEV_CFG(dev) \
-	((const struct gpio_sam_config * const)(dev)->config)
-#define DEV_DATA(dev) \
-	((struct gpio_sam_runtime * const)(dev)->data)
-
 #define GPIO_SAM_ALL_PINS    0xFFFFFFFF
 
 static int gpio_sam_port_configure(const struct device *dev,
 				   uint32_t mask,
 				   gpio_flags_t flags)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 
 	/* No hardware support */
@@ -104,7 +99,7 @@ static int gpio_sam_config(const struct device *dev,
 static int gpio_sam_port_get_raw(const struct device *dev,
 				 uint32_t *value)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 
 	*value = gpio->PVR;
@@ -116,7 +111,7 @@ static int gpio_sam_port_set_masked_raw(const struct device *dev,
 					uint32_t mask,
 					uint32_t value)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 
 	gpio->OVR = (gpio->PVR & ~mask) | (mask & value);
@@ -127,7 +122,7 @@ static int gpio_sam_port_set_masked_raw(const struct device *dev,
 static int gpio_sam_port_set_bits_raw(const struct device *dev,
 				      uint32_t mask)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 
 	gpio->OVRS = mask;
@@ -138,7 +133,7 @@ static int gpio_sam_port_set_bits_raw(const struct device *dev,
 static int gpio_sam_port_clear_bits_raw(const struct device *dev,
 					uint32_t mask)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 
 	gpio->OVRC = mask;
@@ -149,7 +144,7 @@ static int gpio_sam_port_clear_bits_raw(const struct device *dev,
 static int gpio_sam_port_toggle_bits(const struct device *dev,
 				     uint32_t mask)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 
 	gpio->OVRT = mask;
@@ -162,7 +157,7 @@ static int gpio_sam_port_interrupt_configure(const struct device *dev,
 					     enum gpio_int_mode mode,
 					     enum gpio_int_trig trig)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 
 	if (mode == GPIO_INT_MODE_LEVEL) {
@@ -199,7 +194,7 @@ static int gpio_sam_pin_interrupt_configure(const struct device *dev,
 
 static void gpio_sam_isr(const struct device *dev)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 	Gpio * const gpio = cfg->regs;
 	struct gpio_sam_runtime *context = dev->data;
 	uint32_t int_stat;
@@ -232,7 +227,7 @@ static const struct gpio_driver_api gpio_sam_api = {
 
 int gpio_sam_init(const struct device *dev)
 {
-	const struct gpio_sam_config * const cfg = DEV_CFG(dev);
+	const struct gpio_sam_config * const cfg = dev->config;
 
 	soc_pmc_peripheral_enable(cfg->periph_id);
 
diff --git a/drivers/gpio/gpio_stellaris.c b/drivers/gpio/gpio_stellaris.c
index e07ee36fb7d..bb3e5946672 100644
--- a/drivers/gpio/gpio_stellaris.c
+++ b/drivers/gpio/gpio_stellaris.c
@@ -29,14 +29,6 @@ struct gpio_stellaris_runtime {
 	sys_slist_t cb;
 };
 
-#define DEV_CFG(dev)                                     \
-	((const struct gpio_stellaris_config *const)     \
-	(dev)->config)
-
-#define DEV_DATA(dev)					 \
-	((struct gpio_stellaris_runtime *const)          \
-	(dev)->data)
-
 #define GPIO_REG_ADDR(base, offset) (base + offset)
 
 #define GPIO_RW_ADDR(base, offset, p)			 \
@@ -59,8 +51,8 @@ enum gpio_regs {
 
 static void gpio_stellaris_isr(const struct device *dev)
 {
-	const struct gpio_stellaris_config * const cfg = DEV_CFG(dev);
-	struct gpio_stellaris_runtime *context = DEV_DATA(dev);
+	const struct gpio_stellaris_config * const cfg = dev->config;
+	struct gpio_stellaris_runtime *context = dev->data;
 	uint32_t base = cfg->base;
 	uint32_t int_stat = sys_read32(GPIO_REG_ADDR(base, GPIO_MIS_OFFSET));
 
@@ -72,7 +64,7 @@ static void gpio_stellaris_isr(const struct device *dev)
 static int gpio_stellaris_configure(const struct device *dev,
 				    gpio_pin_t pin, gpio_flags_t flags)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 	uint32_t base = cfg->base;
 	uint32_t port_map = cfg->port_map;
 
@@ -116,7 +108,7 @@ static int gpio_stellaris_configure(const struct device *dev,
 static int gpio_stellaris_port_get_raw(const struct device *dev,
 				       uint32_t *value)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 	uint32_t base = cfg->base;
 
 	*value = sys_read32(GPIO_RW_MASK_ADDR(base, GPIO_DATA_OFFSET, 0xff));
@@ -128,7 +120,7 @@ static int gpio_stellaris_port_set_masked_raw(const struct device *dev,
 					      uint32_t mask,
 					      uint32_t value)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 	uint32_t base = cfg->base;
 
 	sys_write32(value, GPIO_RW_MASK_ADDR(base, GPIO_DATA_OFFSET, mask));
@@ -139,7 +131,7 @@ static int gpio_stellaris_port_set_masked_raw(const struct device *dev,
 static int gpio_stellaris_port_set_bits_raw(const struct device *dev,
 					    uint32_t mask)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 	uint32_t base = cfg->base;
 
 	sys_write32(mask, GPIO_RW_MASK_ADDR(base, GPIO_DATA_OFFSET, mask));
@@ -150,7 +142,7 @@ static int gpio_stellaris_port_set_bits_raw(const struct device *dev,
 static int gpio_stellaris_port_clear_bits_raw(const struct device *dev,
 					      uint32_t mask)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 	uint32_t base = cfg->base;
 
 	sys_write32(0, GPIO_RW_MASK_ADDR(base, GPIO_DATA_OFFSET, mask));
@@ -161,7 +153,7 @@ static int gpio_stellaris_port_clear_bits_raw(const struct device *dev,
 static int gpio_stellaris_port_toggle_bits(const struct device *dev,
 					   uint32_t mask)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 	uint32_t base = cfg->base;
 	uint32_t value;
 
@@ -177,7 +169,7 @@ static int gpio_stellaris_pin_interrupt_configure(const struct device *dev,
 						  enum gpio_int_mode mode,
 						  enum gpio_int_trig trig)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 	uint32_t base = cfg->base;
 
 	/* Check if GPIO port needs interrupt support */
@@ -208,7 +200,7 @@ static int gpio_stellaris_pin_interrupt_configure(const struct device *dev,
 
 static int gpio_stellaris_init(const struct device *dev)
 {
-	const struct gpio_stellaris_config *cfg = DEV_CFG(dev);
+	const struct gpio_stellaris_config *cfg = dev->config;
 
 	cfg->config_func(dev);
 	return 0;
@@ -218,7 +210,7 @@ static int gpio_stellaris_manage_callback(const struct device *dev,
 					  struct gpio_callback *callback,
 					  bool set)
 {
-	struct gpio_stellaris_runtime *context = DEV_DATA(dev);
+	struct gpio_stellaris_runtime *context = dev->data;
 
 	gpio_manage_callback(&context->cb, callback, set);