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arch: arm: aarch32: Rework non-Cortex-M exception handling

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This commit reworks the ARM AArch32 non-Cortex-M (i.e. Cortex-A and
Cortex-R) exception handling to establish the base exception handling
framework and support detailed exception information reporting.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is contained in:
Stephanos Ioannidis 2020-04-08 20:16:27 +09:00 • committed by Carles Cufí
commit ae427177c0
7 changed files with 380 additions and 52 deletions
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6
include/arch/arm/aarch32/exc.h
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@ -15,6 +15,7 @@
#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
#if defined(CONFIG_CPU_CORTEX_M)
#include <devicetree.h>
#include <arch/arm/aarch32/cortex_m/nvic.h>
@ -61,6 +62,7 @@
/* Use lowest possible priority level for PendSV */
#define _EXC_PENDSV_PRIO 0xff
#define _EXC_PENDSV_PRIO_MASK Z_EXC_PRIO(_EXC_PENDSV_PRIO)
#endif /* CONFIG_CPU_CORTEX_M */
#ifdef _ASMLANGUAGE
GTEXT(z_arm_exc_exit);
@ -91,7 +93,11 @@ struct __esf {
typedef struct __esf z_arch_esf_t;
#ifdef CONFIG_CPU_CORTEX_M
extern void z_arm_exc_exit(void);
#else
extern void z_arm_exc_exit(bool fatal);
#endif
#ifdef __cplusplus
}