diff --git a/boards/riscv/hifive_unleashed/Kconfig.board b/boards/riscv/hifive_unleashed/Kconfig.board new file mode 100644 index 00000000000..4766e0ea792 --- /dev/null +++ b/boards/riscv/hifive_unleashed/Kconfig.board @@ -0,0 +1,6 @@ +# Copyright (c) 2021 Katsuhiro Suzuki +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_HIFIVE_UNLEASHED + bool "HiFive Unleashed target" + depends on SOC_RISCV_SIFIVE_FU540 diff --git a/boards/riscv/hifive_unleashed/Kconfig.defconfig b/boards/riscv/hifive_unleashed/Kconfig.defconfig new file mode 100644 index 00000000000..249abdb7c99 --- /dev/null +++ b/boards/riscv/hifive_unleashed/Kconfig.defconfig @@ -0,0 +1,23 @@ +# Copyright (c) 2021 Katsuhiro Suzuki +# SPDX-License-Identifier: Apache-2.0 + +if BOARD_HIFIVE_UNLEASHED + +config BOARD + default "hifive_unleashed" + +config SYS_CLOCK_TICKS_PER_SEC + default 1000 + +config SYS_CLOCK_HW_CYCLES_PER_SEC + default 1000000 + +config SPI_SIFIVE + default y + depends on SPI + +config UART_SIFIVE + default y + depends on SERIAL + +endif diff --git a/boards/riscv/hifive_unleashed/board.cmake b/boards/riscv/hifive_unleashed/board.cmake new file mode 100644 index 00000000000..6142f4f1126 --- /dev/null +++ b/boards/riscv/hifive_unleashed/board.cmake @@ -0,0 +1,7 @@ +# SPDX-License-Identifier: Apache-2.0 + +set(OPENOCD_USE_LOAD_IMAGE NO) + +board_runner_args(openocd "--config=${BOARD_DIR}/support/openocd_hifive_unleashed.cfg") + +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/riscv/hifive_unleashed/doc/index.rst b/boards/riscv/hifive_unleashed/doc/index.rst new file mode 100644 index 00000000000..b6fe5bb71dc --- /dev/null +++ b/boards/riscv/hifive_unleashed/doc/index.rst @@ -0,0 +1,44 @@ +.. _hifive_unleashed: + +SiFive HiFive Unleashed +####################### + +Overview +******** + +The HiFive Unleashed is a development board with a SiFive FU540-C000 +multi-core 64bit RISC-V SoC. + +Programming and debugging +************************* + +Building +======== + +Applications for the ``hifive_unleashed`` board configuration can be built as +usual (see :ref:`build_an_application`) using the corresponding board name: + +.. zephyr-app-commands:: + :board: hifive_unleashed + :goals: build + +Flashing +======== + +Current version has not yet supported flashing binary to onboard Flash ROM. + +This board has USB-JTAG interface and this can be used with OpenOCD. +Load applications on DDR and run as follows: + +.. code-block:: console + + openocd -c 'bindto 0.0.0.0' \ + -f boards/riscv/hifive_unleashed/support/openocd_hifive_unleashed.cfg + riscv64-zephyr-elf-gdb build/zephyr/zephyr.elf + (gdb) target remote :3333 + (gdb) c + +Debugging +========= + +Refer to the detailed overview about :ref:`application_debugging`. diff --git a/boards/riscv/hifive_unleashed/hifive_unleashed.dts b/boards/riscv/hifive_unleashed/hifive_unleashed.dts new file mode 100644 index 00000000000..1742d08a922 --- /dev/null +++ b/boards/riscv/hifive_unleashed/hifive_unleashed.dts @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2021 Katsuhiro Suzuki + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include + +/ { + chosen { + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,sram = &ram0; + }; + + ram0: ram0@80000000 { + compatible = "memory"; + reg = <0x80000000 0xf0000000>; + reg-names = "mem"; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + clock-frequency = <500000000>; +}; + +&spi0 { + status = "okay"; + clock-frequency = <500000000>; + + reg = <0x10040000 0x1000 0x20000000 0x2000000>; + flash0: flash@0 { + compatible = "issi,is25wp256d", "jedec,spi-nor"; + size = <33554432>; + label = "FLASH0"; + jedec-id = [96 60 18]; + reg = <0>; + spi-max-frequency = <133000000>; + }; +}; + +&spi1 { + status = "okay"; + clock-frequency = <500000000>; +}; + +&spi2 { + status = "okay"; + clock-frequency = <500000000>; +}; diff --git a/boards/riscv/hifive_unleashed/hifive_unleashed.yaml b/boards/riscv/hifive_unleashed/hifive_unleashed.yaml new file mode 100644 index 00000000000..4e7b31467e4 --- /dev/null +++ b/boards/riscv/hifive_unleashed/hifive_unleashed.yaml @@ -0,0 +1,13 @@ +identifier: hifive_unleashed +name: SiFive HiFive Unleashed +type: mcu +arch: riscv64 +toolchain: + - zephyr +ram: 3840 +testing: + ignore_tags: + - net + - bluetooth +supported: + - spi diff --git a/boards/riscv/hifive_unleashed/hifive_unleashed_defconfig b/boards/riscv/hifive_unleashed/hifive_unleashed_defconfig new file mode 100644 index 00000000000..259dbf0df0a --- /dev/null +++ b/boards/riscv/hifive_unleashed/hifive_unleashed_defconfig @@ -0,0 +1,15 @@ +CONFIG_SOC_SERIES_RISCV_SIFIVE_FREEDOM=y +CONFIG_SOC_RISCV_SIFIVE_FU540=y +CONFIG_BOARD_HIFIVE_UNLEASHED=y +CONFIG_RISCV_MACHINE_TIMER=y +CONFIG_PLIC=y +CONFIG_CONSOLE=y +CONFIG_PRINTK=y +CONFIG_SPI=y +CONFIG_SPI_SIFIVE=y +CONFIG_SERIAL=y +CONFIG_UART_SIFIVE=y +CONFIG_UART_SIFIVE_PORT_0=y +CONFIG_UART_CONSOLE=y +CONFIG_BOOT_BANNER=y +CONFIG_XIP=n diff --git a/boards/riscv/hifive_unleashed/support/openocd_hifive_unleashed.cfg b/boards/riscv/hifive_unleashed/support/openocd_hifive_unleashed.cfg new file mode 100644 index 00000000000..1620f6cbd39 --- /dev/null +++ b/boards/riscv/hifive_unleashed/support/openocd_hifive_unleashed.cfg @@ -0,0 +1,22 @@ +adapter speed 10000 + +adapter driver ftdi +ftdi_device_desc "Dual RS232-HS" +ftdi_vid_pid 0x0403 0x6010 + +ftdi_layout_init 0x0008 0x001b +ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020 + +set _CHIPNAME riscv +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000913 + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME -rtos hwthread +target create $_TARGETNAME.1 riscv -chain-position $_TARGETNAME -coreid 1 +target create $_TARGETNAME.2 riscv -chain-position $_TARGETNAME -coreid 2 +target create $_TARGETNAME.3 riscv -chain-position $_TARGETNAME -coreid 3 +target create $_TARGETNAME.4 riscv -chain-position $_TARGETNAME -coreid 4 +target smp $_TARGETNAME.0 $_TARGETNAME.1 $_TARGETNAME.2 $_TARGETNAME.3 $_TARGETNAME.4 +$_TARGETNAME.0 configure -work-area-phys 0x80000000 -work-area-size 0x4000 -work-area-backup 1 + +flash bank onboard_spi_flash0 fespi 0x20000000 0 0 0 $_TARGETNAME.0 0x10040000