diff --git a/tests/drivers/pwm/pwm_api/Makefile b/tests/drivers/pwm/pwm_api/Makefile new file mode 100644 index 00000000000..0e0de3a6b29 --- /dev/null +++ b/tests/drivers/pwm/pwm_api/Makefile @@ -0,0 +1,4 @@ +BOARD ?= quark_se_c1000_devboard +CONF_FILE = prj.conf + +include ${ZEPHYR_BASE}/Makefile.test diff --git a/tests/drivers/pwm/pwm_api/prj.conf b/tests/drivers/pwm/pwm_api/prj.conf new file mode 100644 index 00000000000..f98ca9b0d16 --- /dev/null +++ b/tests/drivers/pwm/pwm_api/prj.conf @@ -0,0 +1,2 @@ +CONFIG_PWM=y +CONFIG_ZTEST=y diff --git a/tests/drivers/pwm/pwm_api/src/Makefile b/tests/drivers/pwm/pwm_api/src/Makefile new file mode 100644 index 00000000000..a488e998886 --- /dev/null +++ b/tests/drivers/pwm/pwm_api/src/Makefile @@ -0,0 +1,3 @@ +include $(ZEPHYR_BASE)/tests/Makefile.test + +obj-y += main.o test_pwm.o diff --git a/tests/drivers/pwm/pwm_api/src/main.c b/tests/drivers/pwm/pwm_api/src/main.c new file mode 100644 index 00000000000..1a63ff1bc0d --- /dev/null +++ b/tests/drivers/pwm/pwm_api/src/main.c @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2016 Intel Corporation + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/** + * @addtogroup t_driver_pwm + * @{ + * @defgroup t_pwm_basic test_pwm_basic_operations + * @} + */ + +#include +#include + +extern void test_pwm_usec(void); +extern void test_pwm_cycle(void); + +void test_main(void) +{ + ztest_test_suite(pwm_basic_test, + ztest_unit_test(test_pwm_usec), + ztest_unit_test(test_pwm_cycle)); + ztest_run_test_suite(pwm_basic_test); +} diff --git a/tests/drivers/pwm/pwm_api/src/test_pwm.c b/tests/drivers/pwm/pwm_api/src/test_pwm.c new file mode 100644 index 00000000000..43ead2e3c11 --- /dev/null +++ b/tests/drivers/pwm/pwm_api/src/test_pwm.c @@ -0,0 +1,115 @@ +/* + * Copyright (c) 2016 Intel Corporation. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * @addtogroup test_pwm_basic_operations + * @{ + * @defgroup t_pwm_basic_operations test_pwm_sample + * @brief TestPurpose: verify PWM can work well when configure + * through usec or cycle. + * @details + * - Test Steps + * -# Bind PWM port 0. + * -# Set PWM period and pulse using pwm_pin_set_cycles() or + * pwm_pin_set_usec(). + * -# Use multimeter or other instruments to measure the output + * from PWM_OUT_0. + * - Expected Results + * -# The output of PWM_OUT_0 will differ according to the value + * of period and pulse. + * Always on -> Period : Pulse (1 : 1) -> 3.3V + * Half on -> Period : Pulse (2 : 1) -> 1.65V + * Always off -> Period : Pulse (1 : 0) -> 0V + * @} + */ + +#include +#include +#include +#include +#include + +#define PWM_DEV_NAME CONFIG_PWM_QMSI_DEV_NAME + +#define DEFAULT_PWM_PORT 0 +#define DEFAULT_PERIOD_CYCLE 64000 +#define DEFAULT_PULSE_CYCLE 32000 +#define DEFAULT_PERIOD_USEC 2000 +#define DEFAULT_PULSE_USEC 1000 + +static int test_task(uint32_t port, uint32_t period, uint32_t pulse, bool cycle) +{ + TC_PRINT("[PWM]: %" PRIu8 ", [period]: %" PRIu32 ", [pulse]: %" PRIu32 "\n", + port, period, pulse); + + struct device *pwm_dev = device_get_binding(PWM_DEV_NAME); + + if (!pwm_dev) { + TC_PRINT("Cannot get PWM device\n"); + return TC_FAIL; + } + + if (cycle) { + /* Verify pwm_pin_set_cycles() */ + if (pwm_pin_set_cycles(pwm_dev, port, period, pulse)) { + TC_PRINT("Fail to set the period and pulse width\n"); + return TC_FAIL; + } + } else { + /* Verify pwm_pin_set_usec() */ + if (pwm_pin_set_usec(pwm_dev, port, period, pulse)) { + TC_PRINT("Fail to set the period and pulse width\n"); + return TC_FAIL; + } + } + + return TC_PASS; +} + +void test_pwm_usec(void) +{ + /* Period : Pulse (2000 : 1000), unit (usec). Voltage : 1.65V */ + assert_true(test_task(DEFAULT_PWM_PORT, DEFAULT_PERIOD_USEC, + DEFAULT_PULSE_USEC, false) == TC_PASS, NULL); + k_sleep(1000); + + /* Period : Pulse (2000 : 2000), unit (usec). Voltage : 3.3V */ + assert_true(test_task(DEFAULT_PWM_PORT, DEFAULT_PERIOD_USEC, + DEFAULT_PERIOD_USEC, false) == TC_PASS, NULL); + k_sleep(1000); + + /* Period : Pulse (2000 : 0), unit (usec). Voltage : 0V */ + assert_true(test_task(DEFAULT_PWM_PORT, DEFAULT_PERIOD_USEC, + 0, false) == TC_PASS, NULL); + k_sleep(1000); +} + +void test_pwm_cycle(void) +{ + /* Period : Pulse (64000 : 32000), unit (cycle). Voltage : 1.65V */ + assert_true(test_task(DEFAULT_PWM_PORT, DEFAULT_PERIOD_CYCLE, + DEFAULT_PULSE_CYCLE, true) == TC_PASS, NULL); + k_sleep(1000); + + /* Period : Pulse (64000 : 64000), unit (cycle). Voltage : 3.3V */ + assert_true(test_task(DEFAULT_PWM_PORT, DEFAULT_PERIOD_CYCLE, + DEFAULT_PERIOD_CYCLE, true) == TC_PASS, NULL); + k_sleep(1000); + + /* Period : Pulse (64000 : 0), unit (cycle). Voltage : 0V */ + assert_true(test_task(DEFAULT_PWM_PORT, DEFAULT_PERIOD_CYCLE, + 0, true) == TC_PASS, NULL); +} diff --git a/tests/drivers/pwm/pwm_api/testcase.ini b/tests/drivers/pwm/pwm_api/testcase.ini new file mode 100644 index 00000000000..8ae84e76df2 --- /dev/null +++ b/tests/drivers/pwm/pwm_api/testcase.ini @@ -0,0 +1,3 @@ +[test_pwm] +tags = drivers +platform_whitelist = quark_se_c1000_devboard quark_se_c1000_ss_devboard_quark_d2000_crb arduino_101 arduino_101_sss