drivers: uart_cc32xx: use device tree iteration
Add posibility to configure UART_X device based on board dts config. Enable uart clock only if node is enabled Signed-off-by: Pavlo Hamov <pasha.gamov@gmail.com>
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b27bca4b45
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1 changed files with 40 additions and 24 deletions
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@ -18,6 +18,8 @@
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#include <driverlib/uart.h>
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struct uart_cc32xx_dev_data_t {
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uint32_t prcm;
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uint32_t baud_rate;
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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uart_irq_callback_user_data_t cb; /**< Callback function pointer */
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void *cb_data; /**< Callback function arg */
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@ -36,17 +38,6 @@ struct uart_cc32xx_dev_data_t {
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static void uart_cc32xx_isr(const struct device *dev);
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#endif
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static const struct uart_device_config uart_cc32xx_dev_cfg_0 = {
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.base = (void *)DT_INST_REG_ADDR(0),
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(0, clocks, clock_frequency)
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};
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static struct uart_cc32xx_dev_data_t uart_cc32xx_dev_data_0 = {
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.cb = NULL,
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#endif
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};
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/*
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* CC32XX UART has a configurable FIFO length, from 1 to 8 characters.
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* However, the Zephyr console driver, and the Zephyr uart sample test, assume
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@ -57,13 +48,17 @@ static struct uart_cc32xx_dev_data_t uart_cc32xx_dev_data_0 = {
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static int uart_cc32xx_init(const struct device *dev)
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{
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const struct uart_device_config *config = DEV_CFG(dev);
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const struct uart_cc32xx_dev_data_t *data = DEV_DATA(dev);
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MAP_PRCMPeripheralReset(PRCM_UARTA0);
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MAP_PRCMPeripheralClkEnable(data->prcm,
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PRCM_RUN_MODE_CLK | PRCM_SLP_MODE_CLK);
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MAP_PRCMPeripheralReset(data->prcm);
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/* This also calls MAP_UARTEnable() to enable the FIFOs: */
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MAP_UARTConfigSetExpClk((unsigned long)config->base,
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MAP_PRCMPeripheralClockGet(PRCM_UARTA0),
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DT_INST_PROP(0, current_speed),
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MAP_PRCMPeripheralClockGet(data->prcm),
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data->baud_rate,
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(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE
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| UART_CONFIG_PAR_NONE));
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MAP_UARTFlowControlSet((unsigned long)config->base,
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@ -75,11 +70,7 @@ static int uart_cc32xx_init(const struct device *dev)
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/* Clear any pending UART RX interrupts: */
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MAP_UARTIntClear((unsigned long)config->base, UART_INT_RX);
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IRQ_CONNECT(DT_INST_IRQN(0),
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DT_INST_IRQ(0, priority),
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uart_cc32xx_isr, DEVICE_DT_INST_GET(0),
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0);
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irq_enable(DT_INST_IRQN(0));
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config->irq_config_func(dev);
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/* Fill the tx fifo, so Zephyr console & shell subsystems get "primed"
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* with first tx fifo empty interrupt when they first call
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@ -314,8 +305,33 @@ static const struct uart_driver_api uart_cc32xx_driver_api = {
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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};
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DEVICE_DT_INST_DEFINE(0, uart_cc32xx_init,
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device_pm_control_nop, &uart_cc32xx_dev_data_0,
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&uart_cc32xx_dev_cfg_0,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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(void *)&uart_cc32xx_driver_api);
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#define UART_32XX_DEVICE(idx) \
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IF_ENABLED(CONFIG_UART_INTERRUPT_DRIVEN, \
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(static void uart_cc32xx_cfg_func_##idx(const struct device *dev) \
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{ \
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IF_ENABLED(CONFIG_UART_INTERRUPT_DRIVEN, ( \
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IRQ_CONNECT(DT_INST_IRQN(idx), \
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DT_INST_IRQ(idx, priority), \
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uart_cc32xx_isr, DEVICE_DT_INST_GET(idx), \
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0); \
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irq_enable(DT_INST_IRQN(idx))) \
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); \
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})); \
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static const struct uart_device_config uart_cc32xx_dev_cfg_##idx = { \
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.base = (void *)DT_INST_REG_ADDR(idx), \
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.sys_clk_freq = DT_INST_PROP_BY_PHANDLE(idx, clocks, clock_frequency),\
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IF_ENABLED(CONFIG_UART_INTERRUPT_DRIVEN, \
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(.irq_config_func = uart_cc32xx_cfg_func_##idx,)) \
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}; \
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static struct uart_cc32xx_dev_data_t uart_cc32xx_dev_data_##idx = { \
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.prcm = PRCM_UARTA##idx, \
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.baud_rate = DT_INST_PROP(idx, current_speed), \
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IF_ENABLED(CONFIG_UART_INTERRUPT_DRIVEN, (.cb = NULL,)) \
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}; \
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DEVICE_DT_INST_DEFINE(idx, uart_cc32xx_init, \
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device_pm_control_nop, &uart_cc32xx_dev_data_##idx, \
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&uart_cc32xx_dev_cfg_##idx, \
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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(void *)&uart_cc32xx_driver_api); \
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DT_INST_FOREACH_STATUS_OKAY(UART_32XX_DEVICE);
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