soc: mimxrt685s/cm33: Fix lockup on clock config
Imply CONFIG_INIT_AUDIO_PLL on nxp,dmic driver selection on mimxrt685s/cm33. Make DMIC clock config dependent on the use of the RT685's audio PLL. Fixes a regression described in #77851. Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
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2 changed files with 4 additions and 1 deletions
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@ -55,6 +55,9 @@ endif # MBEDTLS
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config I2S_MCUX_FLEXCOMM
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config I2S_MCUX_FLEXCOMM
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select INIT_AUDIO_PLL
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select INIT_AUDIO_PLL
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config AUDIO_DMIC_MCUX
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select INIT_AUDIO_PLL
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if MCUX_OS_TIMER
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if MCUX_OS_TIMER
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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config SYS_CLOCK_HW_CYCLES_PER_SEC
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@ -317,7 +317,7 @@ static ALWAYS_INLINE void clock_init(void)
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CLOCK_SetClkDiv(kCLOCK_DivAdcClk, DT_PROP(DT_NODELABEL(lpadc0), clk_divider));
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CLOCK_SetClkDiv(kCLOCK_DivAdcClk, DT_PROP(DT_NODELABEL(lpadc0), clk_divider));
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#endif
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#endif
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(dmic0), nxp_dmic, okay)
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#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(dmic0), nxp_dmic, okay) && CONFIG_INIT_AUDIO_PLL
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/* Using the Audio PLL as input clock leads to better clock dividers
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/* Using the Audio PLL as input clock leads to better clock dividers
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* for typical PCM sample rates ({8,16,24,32,48,96} kHz.
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* for typical PCM sample rates ({8,16,24,32,48,96} kHz.
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*/
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*/
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