arm: core: mpu: Add arm core MPU interface

This patch adds the arm core MPU interface, a common way to access the
pu functionalities by the arm zephyr kernel.

The interface can be divided in two parts:
- a core part that will be implemented by the arm_core_mpu driver and
  used directly by the kernel
- a driver part that will be implemented by the mpu drivers and used by
  the arm_core_mpu driver

Change-Id: I590bd284abc40d98b06fdf1efb5800903313aa00
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>

arch/arm/core/cortex_m/mpu/Kconfig

@@ -6,10 +6,26 @@
 # SPDX-License-Identifier: Apache-2.0
 #
 
+config ARM_CORE_MPU
+	bool "ARM Core MPU functionalities"
+	depends on CPU_HAS_MPU
+	select THREAD_STACK_INFO
+	default n
+	help
+	  ARM Core MPU functionalities
+
+config MPU_STACK_GUARD
+	bool "Thread Stack Guards"
+	depends on ARM_CORE_MPU
+	default n
+	help
+	  Enable Thread Stack Guards via MPU
+
 config ARM_MPU
 	bool "ARM MPU Support"
 	depends on CPU_HAS_MPU
 	depends on SOC_FAMILY_ARM || SOC_FAMILY_STM32
+	select ARM_CORE_MPU
 	default n
 	help
 	  MCU has ARM MPU
@@ -18,6 +34,7 @@ config NXP_MPU
 	bool "NXP MPU Support"
 	depends on CPU_HAS_MPU
 	depends on SOC_FAMILY_KINETIS
+	select ARM_CORE_MPU
 	default n
 	help
 	  MCU has NXP MPU

include/arch/arm/cortex_m/mpu/arm_core_mpu.h

@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ARM_CORE_MPU_H_
+#define _ARM_CORE_MPU_H_
+
+#include <kernel_structs.h>
+
+#if defined(CONFIG_ARM_MPU)
+#include <arch/arm/cortex_m/mpu/arm_mpu.h>
+#elif defined(CONFIG_NXP_MPU)
+#include <arch/arm/cortex_m/mpu/nxp_mpu.h>
+#else
+#error "Unsupported MPU"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(CONFIG_MPU_STACK_GUARD)
+/**
+ * @brief Configure MPU stack guard
+ *
+ * This function configures per thread stack guards reprogramming the MPU.
+ * The functionality is meant to be used during context switch.
+ *
+ * @param thread thread info data structure.
+ */
+void configure_mpu_stack_guard(struct k_thread *thread);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ARM_CORE_MPU_H */

include/arch/arm/cortex_m/mpu/arm_core_mpu_dev.h

@@ -0,0 +1,66 @@
+/*
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ARM_CORE_MPU_DEV_H_
+#define _ARM_CORE_MPU_DEV_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * The defines below represent the region types. The MPU driver is responsible
+ * to allocate the region accordingly to the type and set the correct
+ * attributes.
+ *
+ * Each MPU is different and has a different set of attributes, hence instead
+ * of having the attributes at this level the arm_mpu_core defines the intent
+ * types.
+ * An intent type (i.e. THREAD_STACK_GUARD) can correspond to a different set
+ * of operations and attributes for each MPU and it is responsibility of the
+ * MPU driver to select the correct ones.
+ *
+ * The intent based configuration can't fail hence at this level no error
+ * is returned by the configuration functions.
+ * If one of the operations corresponding to an intent fails the error has to
+ * be managed inside the MPU driver and not escalated.
+ */
+/* Thread Stack Region Intent Type */
+#define THREAD_STACK_REGION 0x1
+#define THREAD_STACK_GUARD_REGION 0x2
+
+#if defined(CONFIG_ARM_CORE_MPU)
+/* ARM Core MPU Driver API */
+
+/*
+ * This API has to be implemented by all the MPU drivers that have
+ * ARM_CORE_MPU support.
+ */
+
+/**
+ * @brief enable the MPU
+ */
+void arm_core_mpu_enable(void);
+
+/**
+ * @brief disable the MPU
+ */
+void arm_core_mpu_disable(void);
+
+/**
+ * @brief configure the base address and size for an MPU region
+ *
+ * @param   type    MPU region type
+ * @param   base    base address in RAM
+ * @param   size    size of the region
+ */
+void arm_core_mpu_configure(u8_t type, u32_t base, u32_t size);
+#endif /* CONFIG_ARM_CORE_MPU */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _ARM_CORE_MPU_DEV_H */

include/arch/arm/cortex_m/mpu/arm_mpu.h

@@ -6,6 +6,8 @@
 #ifndef _ARM_MPU_H_
 #define _ARM_MPU_H_
 
+#include <arch/arm/cortex_m/mpu/arm_core_mpu_dev.h>
+
 struct arm_mpu {
 	/* 0xE000ED90 MPU Type Register */
 	volatile u32_t type;

include/arch/arm/cortex_m/mpu/nxp_mpu.h

@@ -7,6 +7,7 @@
 #define _NXP_MPU_H_
 
 #include <fsl_common.h>
+#include <arch/arm/cortex_m/mpu/arm_core_mpu_dev.h>
 
 #define NXP_MPU_BASE SYSMPU_BASE