From acac1584bcc1f3b3d83ad8f478bb5c57ea3935a1 Mon Sep 17 00:00:00 2001 From: Kieran Levin Date: Mon, 23 Mar 2020 10:29:50 -0700 Subject: [PATCH] drivers: serial: add dts peripherals to stm32g0 Added device tree nodes and associated headers for defined uarts on the stm32g0 and stm32g07x 8x parts. Tested with uart on stm32g071rb disco board with usart3 going to stlink. Using shell. Signed-off-by: Kieran Levin --- drivers/serial/Kconfig.stm32 | 2 +- dts/arm/st/g0/stm32g0.dtsi | 11 +++++++++++ dts/arm/st/g0/stm32g071.dtsi | 24 ++++++++++++++++++++++++ soc/arm/st_stm32/stm32g0/soc.h | 1 + 4 files changed, 37 insertions(+), 1 deletion(-) diff --git a/drivers/serial/Kconfig.stm32 b/drivers/serial/Kconfig.stm32 index 922936098f0..d4382f83eb8 100644 --- a/drivers/serial/Kconfig.stm32 +++ b/drivers/serial/Kconfig.stm32 @@ -99,7 +99,7 @@ config UART_10 config LPUART_1 bool "Enable STM32 LPUART1 Port" - depends on SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32H7X || SOC_SERIES_STM32G4X + depends on SOC_SERIES_STM32L0X || SOC_SERIES_STM32L4X || SOC_SERIES_STM32WBX || SOC_SERIES_STM32H7X || SOC_SERIES_STM32G4X || SOC_SERIES_STM32G0X help Enable support for LPUART1 port in the driver. Say y here if you want to use LPUART1 device. diff --git a/dts/arm/st/g0/stm32g0.dtsi b/dts/arm/st/g0/stm32g0.dtsi index 692eac5f29b..88f13f1211b 100644 --- a/dts/arm/st/g0/stm32g0.dtsi +++ b/dts/arm/st/g0/stm32g0.dtsi @@ -2,6 +2,7 @@ * Copyright (c) 2019 Philippe Retornaz * Copyright (c) 2019 ST Microelectronics * Copyright (c) 2019 Centaur Analytics, Inc + * Copyright (C) 2020 Framework Computer LLC * * SPDX-License-Identifier: Apache-2.0 */ @@ -121,6 +122,16 @@ status = "disabled"; }; + lpuart1: serial@40008000 { + compatible = "st,stm32-lpuart", "st,stm32-uart"; + reg = <0x40008000 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; + interrupts = <29 3>; + interrupt-names = "combined"; + status = "disabled"; + label = "LPUART_1"; + }; + usart1: serial@40013800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40013800 0x400>; diff --git a/dts/arm/st/g0/stm32g071.dtsi b/dts/arm/st/g0/stm32g071.dtsi index 49c68eeaaae..010bb6d54bf 100644 --- a/dts/arm/st/g0/stm32g071.dtsi +++ b/dts/arm/st/g0/stm32g071.dtsi @@ -6,3 +6,27 @@ */ #include + +/ { + soc { + usart3: serial@40004800 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; + interrupts = <29 0>; + interrupt-names = "combined"; + status = "disabled"; + label = "UART_3"; + }; + + usart4: serial@40004c00 { + compatible = "st,stm32-usart", "st,stm32-uart"; + reg = <0x40004c00 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; + interrupts = <29 1>; + interrupt-names = "combined"; + status = "disabled"; + label = "UART_4"; + }; + }; +}; diff --git a/soc/arm/st_stm32/stm32g0/soc.h b/soc/arm/st_stm32/stm32g0/soc.h index 70262c71da9..38d53fde6dc 100644 --- a/soc/arm/st_stm32/stm32g0/soc.h +++ b/soc/arm/st_stm32/stm32g0/soc.h @@ -54,6 +54,7 @@ #ifdef CONFIG_SERIAL_HAS_DRIVER #include +#include #endif #ifdef CONFIG_HWINFO_STM32