soc: arm: cypress: psoc6: Enable Cortex-M4

Configure Cortex-M0+ to start Cortex-M4 CPU.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
This commit is contained in:
Gerson Fernando Budke 2021-06-23 20:07:06 -03:00 committed by Anas Nashif
commit ac8570f7c8
3 changed files with 63 additions and 0 deletions

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@ -176,6 +176,59 @@ Cy_WDT_Disable().
You should see "Hello World! cy8ckit_062_ble_m0" in your terminal.
Running on Dual Core
********************
#. Build the Zephyr kernel and the :ref:`button-sample` sample application:
.. zephyr-app-commands::
:zephyr-app: samples/basic/button
:board: cy8ckit_062_ble_m4
:goals: build
:compact:
#. If you have a USB-Serial adapter, you can connect SBC[UART]-6 on Arduino
header. Schematic should be checked for connections. Run your favorite
terminal program again now listen for another output. Under Linux the
terminal should be :code:`/dev/ttyUSB0`. For example:
.. code-block:: console
$ minicom -D /dev/ttyUSB0 -o
The -o option tells minicom not to send the modem initialization
string. Connection should be configured as follows:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
#. To flash an image:
.. zephyr-app-commands::
:zephyr-app: samples/basic/button
:board: cy8ckit_062_ble_m4
:goals: flash
:compact:
#. Configure Cortex-M0+ to enable Cortex-M4:
The last step flash the M4 image on the flash. However, Cortex-M0 by default
doesn't start the M4 and nothing will happen. To enable Cortex-M4 CPU,
repeat the steps on programming and debug and add the following parameter
when performing the build process.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: cy8ckit_062_ble_m0
:goals: build flash
:gen-args: -DCONFIG_SOC_PSOC6_M0_ENABLES_M4=y
:compact:
Now you can press button SW-2 and see LED-9 blink at same time you have the
"Hello World! cy8ckit_062_ble_m0" in the your terminal.
Board Revision
**************

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@ -21,6 +21,12 @@ config SOC_PSOC6_M4
endchoice
config SOC_PSOC6_M0_ENABLES_M4
bool "Enable dual-core support [activate Cortex-M4]"
depends on SOC_PSOC6_M0
help
Cortex-M0 CPU should boot Cortex-M4
config SOC_FAMILY_PSOC6
bool

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@ -368,6 +368,10 @@ void Cy_SystemInit(void)
/* Configure peripheral clocks */
Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_8_BIT, 0u, 0u);
Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_8_BIT, 0u);
#if defined(CONFIG_SOC_PSOC6_M0_ENABLES_M4)
Cy_SysEnableCM4(DT_REG_ADDR(DT_NODELABEL(flash1)));
#endif
}
static int init_cycfg_platform_wraper(const struct device *arg)