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soc: arm: atmel: remove custom fixed MPU region definition

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We remove the custom fixed MPU region definition from Atmel
SAM SoC definition, as the common fixed MPU region definition
is now used.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2019-12-05 16:24:48 +01:00 • committed by Anas Nashif
commit ac35acd5aa
3 changed files with 0 additions and 111 deletions
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5
soc/arm/atmel_sam/common/CMakeLists.txt
View file

@ -5,8 +5,3 @@ zephyr_sources(
soc_pmc.c
soc_gpio.c
)
zephyr_sources_ifdef(
CONFIG_ARM_MPU
arm_mpu_regions.c
)

74
soc/arm/atmel_sam/common/arm_mpu_mem_cfg.h
View file

@ -1,74 +0,0 @@
/*
* Copyright (c) 2017 Linaro Limited.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _ARM_MPU_MEM_CFG_H_
#define _ARM_MPU_MEM_CFG_H_
#include <soc.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
/* Flash Region Definitions */
#if CONFIG_FLASH_SIZE == 64
#define REGION_FLASH_SIZE REGION_64K
#elif CONFIG_FLASH_SIZE == 128
#define REGION_FLASH_SIZE REGION_128K
#elif CONFIG_FLASH_SIZE == 256
#define REGION_FLASH_SIZE REGION_256K
#elif CONFIG_FLASH_SIZE == 512
#define REGION_FLASH_SIZE REGION_512K
#elif CONFIG_FLASH_SIZE == 1024
#define REGION_FLASH_SIZE REGION_1M
#elif CONFIG_FLASH_SIZE == 1536
#define REGION_FLASH_SIZE REGION_2M /* last 512kB are not mapped */
#elif CONFIG_FLASH_SIZE == 2048
#define REGION_FLASH_SIZE REGION_2M
#else
#error "Unsupported configuration"
#endif
/* SRAM Region Definitions */
#if CONFIG_SRAM_SIZE == 12
#define REGION_SRAM_0_SIZE REGION_8K
#define REGION_SRAM_1_START 0x2000
#define REGION_SRAM_1_SIZE REGION_4K
#elif CONFIG_SRAM_SIZE == 20
#define REGION_SRAM_0_SIZE REGION_16K
#define REGION_SRAM_1_START 0x4000
#define REGION_SRAM_1_SIZE REGION_4K
#elif CONFIG_SRAM_SIZE == 32
#define REGION_SRAM_0_SIZE REGION_32K
#elif CONFIG_SRAM_SIZE == 40
#define REGION_SRAM_0_SIZE REGION_32K
#define REGION_SRAM_1_START 0x8000
#define REGION_SRAM_1_SIZE REGION_8K
#elif CONFIG_SRAM_SIZE == 64
#define REGION_SRAM_0_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 96
#define REGION_SRAM_0_SIZE REGION_64K
#define REGION_SRAM_1_START 0x10000
#define REGION_SRAM_1_SIZE REGION_32K
#elif CONFIG_SRAM_SIZE == 128
#define REGION_SRAM_0_SIZE REGION_128K
#elif CONFIG_SRAM_SIZE == 192
#define REGION_SRAM_0_SIZE REGION_128K
#define REGION_SRAM_1_START 0x20000
#define REGION_SRAM_1_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 256
#define REGION_SRAM_0_SIZE REGION_256K
#elif CONFIG_SRAM_SIZE == 320
#define REGION_SRAM_0_SIZE REGION_256K
#define REGION_SRAM_1_START 0x40000
#define REGION_SRAM_1_SIZE REGION_64K
#elif CONFIG_SRAM_SIZE == 384
#define REGION_SRAM_0_SIZE REGION_256K
#define REGION_SRAM_1_START 0x40000
#define REGION_SRAM_1_SIZE REGION_128K
#else
#error "Unsupported configuration"
#endif
#define PERIPHERAL_BASE 0x40000000U /* Peripheral base address */
#endif /* _ARM_MPU_MEM_CFG_H_ */

32
soc/arm/atmel_sam/common/arm_mpu_regions.c
View file

@ -1,32 +0,0 @@
/*
* Copyright (c) 2017 Intel Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <sys/slist.h>
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
#include "arm_mpu_mem_cfg.h"
static const struct arm_mpu_region mpu_regions[] = {
/* Region 0 */
MPU_REGION_ENTRY("FLASH_0",
CONFIG_FLASH_BASE_ADDRESS,
REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
MPU_REGION_ENTRY("SRAM_0",
CONFIG_SRAM_BASE_ADDRESS,
REGION_RAM_ATTR(REGION_SRAM_0_SIZE)),
#ifdef REGION_SRAM_1_SIZE
MPU_REGION_ENTRY("SRAM_1",
CONFIG_SRAM_BASE_ADDRESS + REGION_SRAM_1_START,
REGION_RAM_ATTR(REGION_SRAM_1_SIZE)),
#endif
};
const struct arm_mpu_config mpu_config = {
.num_regions = ARRAY_SIZE(mpu_regions),
.mpu_regions = mpu_regions,
};