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soc: arm: nxp_imx: add FLEXSPI1 and FLEXSPI2 memory sections for RT5xx

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Add FLEXSPI1 and FLEXSPI2 memory sections for RT5xx SOC. These sections
can be used by the user's application as part of a custom linker script,
if the application needs to relocate a buffer to external SRAM connected
to FLEXSPI1 or FLEXSPI2

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit is contained in:
Daniel DeGrasse 2023-04-30 19:25:59 -05:00 • committed by Mahesh Mahadevan
commit ac0ae62b58
1 changed files with 13 additions and 1 deletions
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14
soc/arm/nxp_imx/rt5xx/linker.ld
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@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, NXP
* Copyright 2021,2023 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
@ -9,4 +9,16 @@
*
* This is the linker script for both standard images and XIP images.
*/
#include <zephyr/devicetree.h>
MEMORY
{
#if (DT_REG_SIZE_BY_IDX(DT_NODELABEL(flexspi1), 1) > 0)
FLEXSPI1 (wx) : ORIGIN = DT_REG_ADDR_BY_IDX(DT_NODELABEL(flexspi1), 1), LENGTH = DT_REG_SIZE_BY_IDX(DT_NODELABEL(flexspi1), 1)
#endif
#if (DT_REG_SIZE_BY_IDX(DT_NODELABEL(flexspi2), 1) > 0)
FLEXSPI2 (wx) : ORIGIN = DT_REG_ADDR_BY_IDX(DT_NODELABEL(flexspi2), 1), LENGTH = DT_REG_SIZE_BY_IDX(DT_NODELABEL(flexspi2), 1)
#endif
}
#include <zephyr/arch/arm/aarch32/cortex_m/scripts/linker.ld>