diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270.dtsi b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270.dtsi index 1270676c77a..8e0424bb9c3 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270.dtsi +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270.dtsi @@ -31,13 +31,12 @@ status = "okay"; }; -&can0 { - pinctrl-0 = <&can0_default>; +&canxl0 { + pinctrl-0 = <&canxl0_default>; pinctrl-names = "default"; - status = "okay"; }; -&can1 { - pinctrl-0 = <&can1_default>; +&canxl1 { + pinctrl-0 = <&canxl1_default>; pinctrl-names = "default"; }; diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_pinctrl.dtsi b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_pinctrl.dtsi index 482b43d4b72..78ac6ef5534 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_pinctrl.dtsi +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_pinctrl.dtsi @@ -64,7 +64,7 @@ }; }; - can0_default: can0_default { + canxl0_default: canxl0_default { group1 { pinmux = ; input-enable; @@ -75,7 +75,7 @@ }; }; - can1_default: can1_default { + canxl1_default: canxl1_default { group1 { pinmux = ; input-enable; diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts index 37c2f6b74ff..3db4df08388 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu0.dts @@ -14,7 +14,7 @@ chosen { zephyr,sram = &sram0; - zephyr,canbus = &can0; + zephyr,canbus = &canxl0; }; aliases { @@ -31,3 +31,7 @@ mboxes = <&mru0 0>; mbox-names = "rx"; }; + +&canxl0 { + status = "okay"; +}; diff --git a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts index ce5d16260ab..7d51ceee155 100644 --- a/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts +++ b/boards/nxp/s32z2xxdc2/s32z2xxdc2_s32z270_rtu1.dts @@ -16,7 +16,7 @@ zephyr,sram = &sram1; zephyr,console = &uart0; zephyr,shell-uart = &uart0; - zephyr,canbus = &can0; + zephyr,canbus = &canxl0; }; aliases { diff --git a/dts/arm/nxp/nxp_s32z27x_r52.dtsi b/dts/arm/nxp/nxp_s32z27x_r52.dtsi index afad04b3965..b2bbd21b49b 100644 --- a/dts/arm/nxp/nxp_s32z27x_r52.dtsi +++ b/dts/arm/nxp/nxp_s32z27x_r52.dtsi @@ -686,7 +686,7 @@ }; }; - can0: can@4741b000 { + canxl0: can@4741b000 { compatible = "nxp,s32-canxl"; reg = <0x4741b000 0x1000>, <0x47423000 0x1000>, @@ -700,7 +700,7 @@ clocks = <&clock NXP_S32_P5_CANXL_PE_CLK>; }; - can1: can@4751b000 { + canxl1: can@4751b000 { compatible = "nxp,s32-canxl"; reg = <0x4751b000 0x1000>, <0x47523000 0x1000>,