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arch: xtensa: Fix 10.4 violations

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Both operands of an operator in which the usual arithmetic
conversions are performed shall have the same essential
type category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commit is contained in:
Flavio Ceolin 2021-04-02 22:49:29 -07:00 • committed by Anas Nashif
commit abb1bbe6b1
1 changed files with 1 additions and 1 deletions
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arch/xtensa/core/xtensa-asm2.c
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@ -230,5 +230,5 @@ int z_xtensa_irq_is_enabled(unsigned int irq)
__asm__ volatile("rsr.intenable %0" : "=r"(ie));
return (ie & (1 << irq)) != 0;
return (ie & (1 << irq)) != 0U;
}