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soc: nordic: Add initial support for nRF54H20 EngA

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Add nrfx and Kconfig related infrastructure plus SoC initialization
code to allow building for nRF54H20 targets (Application and Radio
cores).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2024-01-23 17:54:21 +01:00 • committed by Carles Cufí
commit abb0934def
15 changed files with 4193 additions and 1 deletions
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6
modules/hal_nordic/nrfx/CMakeLists.txt
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@ -41,6 +41,11 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_ENGA_CPUAPP NRF_APPLICATION
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9120 NRF9120_XXAA)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9160 NRF9160_XXAA)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_ENGA_CPUAPP NRF54H20_ENGA_XXAA
NRF_APPLICATION)
zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_ENGA_CPURAD NRF54H20_ENGA_XXAA
NRF_RADIOCORE)
zephyr_compile_definitions_ifdef(CONFIG_NRF_APPROTECT_LOCK
ENABLE_APPROTECT)
zephyr_compile_definitions_ifdef(CONFIG_NRF_APPROTECT_USER_HANDLING
@ -71,6 +76,7 @@ zephyr_library_sources_ifdef(CONFIG_SOC_NRF52833 ${MDK_DIR}/system_nrf5283
zephyr_library_sources_ifdef(CONFIG_SOC_NRF52840 ${MDK_DIR}/system_nrf52840.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF5340_CPUAPP ${MDK_DIR}/system_nrf5340_application.c)
zephyr_library_sources_ifdef(CONFIG_SOC_NRF5340_CPUNET ${MDK_DIR}/system_nrf5340_network.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF54HX ${MDK_DIR}/system_nrf54h.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF54LX ${MDK_DIR}/system_nrf54l.c)
zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF91X ${MDK_DIR}/system_nrf91.c)

4
modules/hal_nordic/nrfx/nrfx_config.h
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@ -717,6 +717,10 @@
#include <nrfx_config_nrf5340_application.h>
#elif defined(NRF5340_XXAA_NETWORK)
#include <nrfx_config_nrf5340_network.h>
#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_APPLICATION)
#include <nrfx_config_nrf54h20_enga_application.h>
#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_RADIOCORE)
#include <nrfx_config_nrf54h20_enga_radiocore.h>
#elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA)
#include <nrfx_config_nrf91.h>
#elif defined(NRF54L15_ENGA_XXAA) && defined(NRF_APPLICATION)

1935
modules/hal_nordic/nrfx/nrfx_config_nrf54h20_enga_application.h Normal file
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File diff suppressed because it is too large Load diff

2016
modules/hal_nordic/nrfx/nrfx_config_nrf54h20_enga_radiocore.h Normal file
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File diff suppressed because it is too large Load diff

1
soc/arm/nordic_nrf/Kconfig
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@ -18,6 +18,7 @@ source "soc/arm/nordic_nrf/*/Kconfig.soc"
config NRF_SOC_SECURE_SUPPORTED
def_bool !TRUSTED_EXECUTION_NONSECURE || (BUILD_WITH_TFM && TFM_PARTITION_PLATFORM)
depends on !SOC_SERIES_NRF54HX
help
Hidden function to indicate that that the soc_secure functions are
available.

2
soc/arm/nordic_nrf/Kconfig.defconfig
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@ -11,7 +11,7 @@ source "soc/arm/nordic_nrf/*/Kconfig.defconfig.series"
if SYS_CLOCK_EXISTS
config CLOCK_CONTROL
default y
default y if !SOC_SERIES_NRF54HX
endif # SYS_CLOCK_EXISTS

7
soc/arm/nordic_nrf/nrf54h/CMakeLists.txt Normal file
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@ -0,0 +1,7 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_library_sources(soc.c)
# Ensure that image size aligns with 16 bytes so that MRAMC finalizes all writes
# for the image correctly
zephyr_linker_sources(SECTIONS SORT_KEY zzz_place_align_at_end align.ld)

14
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.nrf54h20_cpuapp Normal file
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@ -0,0 +1,14 @@
# Nordic Semiconductor nRF54H20 Application MCU
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54H20_ENGA_CPUAPP
config SOC
default "nrf54h20_enga_cpuapp"
config NUM_IRQS
default 471
endif # SOC_NRF54H20_ENGA_CPUAPP

14
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.nrf54h20_cpurad Normal file
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@ -0,0 +1,14 @@
# Nordic Semiconductor nRF54H20 Radio MCU
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54H20_ENGA_CPURAD
config SOC
default "nrf54h20_enga_cpurad"
config NUM_IRQS
default 471
endif # SOC_NRF54H20_ENGA_CPURAD

16
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.series Normal file
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@ -0,0 +1,16 @@
# Nordic Semiconductor nRF54H MCU line
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_SERIES_NRF54HX
rsource "Kconfig.defconfig.nrf54h*"
config SOC_SERIES
default "nrf54h"
config CACHE_NRF_CACHE
default y if EXTERNAL_CACHE
endif # SOC_SERIES_NRF54HX

16
soc/arm/nordic_nrf/nrf54h/Kconfig.series Normal file
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@ -0,0 +1,16 @@
# Nordic Semiconductor nRF54H MCU line
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_SERIES_NRF54HX
bool "Nordic Semiconductor nRF54H series MCU"
select ARM
select ARMV8_M_DSP
select CPU_CORTEX_M33
select SOC_FAMILY_NRF
select HAS_NRFX
select HAS_NORDIC_DRIVERS
select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
help
Enable support for nRF54H MCU series

37
soc/arm/nordic_nrf/nrf54h/Kconfig.soc Normal file
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@ -0,0 +1,37 @@
# Nordic Semiconductor nRF54H MCU line
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_NRF54H20
bool "nRF54H20"
depends on SOC_SERIES_NRF54HX
if SOC_NRF54H20
choice
prompt "nRF54H20 MCU Selection"
config SOC_NRF54H20_ENGA_CPUAPP
bool "nRF54H20 ENGA CPUAPP"
select CPU_HAS_ARM_MPU
select CPU_HAS_ARM_SAU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
select CPU_HAS_FPU
config SOC_NRF54H20_ENGA_CPURAD
bool "nRF54H20 ENGA CPURAD"
select CPU_HAS_ARM_MPU
select CPU_HAS_ARM_SAU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE
select CPU_HAS_FPU
endchoice
config NRF_ENABLE_ICACHE
bool "Instruction cache (I-Cache)"
default y
endif # SOC_NRF54H20

10
soc/arm/nordic_nrf/nrf54h/align.ld Normal file
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@ -0,0 +1,10 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA.
* SPDX-License-Identifier: Apache-2.0
*/
SECTION_PROLOGUE(.align16,,)
{
. = (ALIGN(16) > 0 ? ALIGN(16) : 16) - 1;
BYTE(0);
} GROUP_LINK_IN(ROMABLE_REGION)

104
soc/arm/nordic_nrf/nrf54h/soc.c Normal file
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@ -0,0 +1,104 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/cache.h>
#include <zephyr/devicetree.h>
#include <zephyr/init.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <hal/nrf_hsfll.h>
#include <hal/nrf_lrcconf.h>
#include <soc/nrfx_coredep.h>
LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
#if defined(NRF_APPLICATION)
#define HSFLL_NODE DT_NODELABEL(cpuapp_hsfll)
#elif defined(NRF_RADIOCORE)
#define HSFLL_NODE DT_NODELABEL(cpurad_hsfll)
#endif
#define FICR_ADDR_GET(node_id, name) \
DT_REG_ADDR(DT_PHANDLE_BY_NAME(node_id, nordic_ficrs, name)) + \
DT_PHA_BY_NAME(node_id, nordic_ficrs, name, offset)
static void power_domain_init(void)
{
/*
* Set:
* - LRCCONF010.POWERON.MAIN: 1
* - LRCCONF010.POWERON.ACT: 1
* - LRCCONF010.RETAIN.MAIN: 1
* - LRCCONF010.RETAIN.ACT: 1
*
* This is done here at boot so that when the idle routine will hit
* WFI the power domain will be correctly retained.
*/
nrf_lrcconf_poweron_force_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_MAIN, true);
nrf_lrcconf_poweron_force_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_0, true);
nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_MAIN, true);
nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_0, true);
#if defined(CONFIG_SOC_NRF54H20_ENGA_CPUAPP)
nrf_lrcconf_poweron_force_set(NRF_LRCCONF000, NRF_LRCCONF_POWER_DOMAIN_0, true);
#endif
}
static int trim_hsfll(void)
{
NRF_HSFLL_Type *hsfll = (NRF_HSFLL_Type *)DT_REG_ADDR(HSFLL_NODE);
nrf_hsfll_trim_t trim = {
.vsup = sys_read32(FICR_ADDR_GET(HSFLL_NODE, vsup)),
.coarse = sys_read32(FICR_ADDR_GET(HSFLL_NODE, coarse)),
.fine = sys_read32(FICR_ADDR_GET(HSFLL_NODE, fine))
};
LOG_DBG("Trim: HSFLL VSUP: 0x%.8x", trim.vsup);
LOG_DBG("Trim: HSFLL COARSE: 0x%.8x", trim.coarse);
LOG_DBG("Trim: HSFLL FINE: 0x%.8x", trim.fine);
nrf_hsfll_clkctrl_mult_set(hsfll,
DT_PROP(HSFLL_NODE, clock_frequency) /
DT_PROP(DT_CLOCKS_CTLR(HSFLL_NODE), clock_frequency));
nrf_hsfll_trim_set(hsfll, &trim);
nrf_hsfll_task_trigger(hsfll, NRF_HSFLL_TASK_FREQ_CHANGE);
#if defined(CONFIG_SOC_NRF54H20_ENGA_CPUAPP) || defined(CONFIG_SOC_NRF54H20_ENGA_CPURAD)
/* In this HW revision, HSFLL task frequency change needs to be
* triggered additional time to take effect.
*/
nrf_hsfll_task_trigger(hsfll, NRF_HSFLL_TASK_FREQ_CHANGE);
#endif
LOG_DBG("NRF_HSFLL->TRIM.VSUP = %d", hsfll->TRIM.VSUP);
LOG_DBG("NRF_HSFLL->TRIM.COARSE = %d", hsfll->TRIM.COARSE);
LOG_DBG("NRF_HSFLL->TRIM.FINE = %d", hsfll->TRIM.FINE);
return 0;
}
static int nordicsemi_nrf54h_init(void)
{
#if defined(CONFIG_NRF_ENABLE_ICACHE)
sys_cache_instr_enable();
#endif
power_domain_init();
trim_hsfll();
return 0;
}
void arch_busy_wait(uint32_t time_us)
{
nrfx_coredep_delay_us(time_us);
}
SYS_INIT(nordicsemi_nrf54h_init, PRE_KERNEL_1, 0);

12
soc/arm/nordic_nrf/nrf54h/soc.h Normal file
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@ -0,0 +1,12 @@
/*
* Copyright (c) 2024 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef SOC_ARM_NORDIC_NRF_NRF54H_SOC_H_
#define SOC_ARM_NORDIC_NRF_NRF54H_SOC_H_
#include <soc_nrf_common.h>
#endif /* SOC_ARM_NORDIC_NRF_NRF54H_SOC_H_ */