soc: nordic: Add initial support for nRF54H20 EngA
Add nrfx and Kconfig related infrastructure plus SoC initialization code to allow building for nRF54H20 targets (Application and Radio cores). Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com> Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
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15 changed files with 4193 additions and 1 deletions
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@ -41,6 +41,11 @@ zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54L15_ENGA_CPUAPP NRF_APPLICATION
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9120 NRF9120_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF9160 NRF9160_XXAA)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_ENGA_CPUAPP NRF54H20_ENGA_XXAA
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NRF_APPLICATION)
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zephyr_compile_definitions_ifdef(CONFIG_SOC_NRF54H20_ENGA_CPURAD NRF54H20_ENGA_XXAA
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NRF_RADIOCORE)
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zephyr_compile_definitions_ifdef(CONFIG_NRF_APPROTECT_LOCK
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ENABLE_APPROTECT)
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zephyr_compile_definitions_ifdef(CONFIG_NRF_APPROTECT_USER_HANDLING
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@ -71,6 +76,7 @@ zephyr_library_sources_ifdef(CONFIG_SOC_NRF52833 ${MDK_DIR}/system_nrf5283
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zephyr_library_sources_ifdef(CONFIG_SOC_NRF52840 ${MDK_DIR}/system_nrf52840.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_NRF5340_CPUAPP ${MDK_DIR}/system_nrf5340_application.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_NRF5340_CPUNET ${MDK_DIR}/system_nrf5340_network.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF54HX ${MDK_DIR}/system_nrf54h.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF54LX ${MDK_DIR}/system_nrf54l.c)
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zephyr_library_sources_ifdef(CONFIG_SOC_SERIES_NRF91X ${MDK_DIR}/system_nrf91.c)
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@ -717,6 +717,10 @@
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#include <nrfx_config_nrf5340_application.h>
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#elif defined(NRF5340_XXAA_NETWORK)
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#include <nrfx_config_nrf5340_network.h>
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#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_APPLICATION)
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#include <nrfx_config_nrf54h20_enga_application.h>
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#elif defined(NRF54H20_ENGA_XXAA) && defined(NRF_RADIOCORE)
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#include <nrfx_config_nrf54h20_enga_radiocore.h>
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#elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA)
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#include <nrfx_config_nrf91.h>
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#elif defined(NRF54L15_ENGA_XXAA) && defined(NRF_APPLICATION)
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1935
modules/hal_nordic/nrfx/nrfx_config_nrf54h20_enga_application.h
Normal file
1935
modules/hal_nordic/nrfx/nrfx_config_nrf54h20_enga_application.h
Normal file
File diff suppressed because it is too large
Load diff
2016
modules/hal_nordic/nrfx/nrfx_config_nrf54h20_enga_radiocore.h
Normal file
2016
modules/hal_nordic/nrfx/nrfx_config_nrf54h20_enga_radiocore.h
Normal file
File diff suppressed because it is too large
Load diff
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@ -18,6 +18,7 @@ source "soc/arm/nordic_nrf/*/Kconfig.soc"
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config NRF_SOC_SECURE_SUPPORTED
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def_bool !TRUSTED_EXECUTION_NONSECURE || (BUILD_WITH_TFM && TFM_PARTITION_PLATFORM)
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depends on !SOC_SERIES_NRF54HX
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help
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Hidden function to indicate that that the soc_secure functions are
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available.
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@ -11,7 +11,7 @@ source "soc/arm/nordic_nrf/*/Kconfig.defconfig.series"
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if SYS_CLOCK_EXISTS
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config CLOCK_CONTROL
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default y
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default y if !SOC_SERIES_NRF54HX
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endif # SYS_CLOCK_EXISTS
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7
soc/arm/nordic_nrf/nrf54h/CMakeLists.txt
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7
soc/arm/nordic_nrf/nrf54h/CMakeLists.txt
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@ -0,0 +1,7 @@
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# SPDX-License-Identifier: Apache-2.0
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zephyr_library_sources(soc.c)
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# Ensure that image size aligns with 16 bytes so that MRAMC finalizes all writes
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# for the image correctly
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zephyr_linker_sources(SECTIONS SORT_KEY zzz_place_align_at_end align.ld)
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14
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.nrf54h20_cpuapp
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14
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.nrf54h20_cpuapp
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@ -0,0 +1,14 @@
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# Nordic Semiconductor nRF54H20 Application MCU
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NRF54H20_ENGA_CPUAPP
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config SOC
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default "nrf54h20_enga_cpuapp"
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config NUM_IRQS
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default 471
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endif # SOC_NRF54H20_ENGA_CPUAPP
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14
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.nrf54h20_cpurad
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14
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.nrf54h20_cpurad
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@ -0,0 +1,14 @@
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# Nordic Semiconductor nRF54H20 Radio MCU
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_NRF54H20_ENGA_CPURAD
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config SOC
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default "nrf54h20_enga_cpurad"
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config NUM_IRQS
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default 471
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endif # SOC_NRF54H20_ENGA_CPURAD
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16
soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.series
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soc/arm/nordic_nrf/nrf54h/Kconfig.defconfig.series
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@ -0,0 +1,16 @@
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# Nordic Semiconductor nRF54H MCU line
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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if SOC_SERIES_NRF54HX
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rsource "Kconfig.defconfig.nrf54h*"
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config SOC_SERIES
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default "nrf54h"
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config CACHE_NRF_CACHE
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default y if EXTERNAL_CACHE
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endif # SOC_SERIES_NRF54HX
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16
soc/arm/nordic_nrf/nrf54h/Kconfig.series
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16
soc/arm/nordic_nrf/nrf54h/Kconfig.series
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@ -0,0 +1,16 @@
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# Nordic Semiconductor nRF54H MCU line
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config SOC_SERIES_NRF54HX
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bool "Nordic Semiconductor nRF54H series MCU"
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select ARM
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select ARMV8_M_DSP
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select CPU_CORTEX_M33
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select SOC_FAMILY_NRF
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select HAS_NRFX
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select HAS_NORDIC_DRIVERS
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select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
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help
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Enable support for nRF54H MCU series
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37
soc/arm/nordic_nrf/nrf54h/Kconfig.soc
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37
soc/arm/nordic_nrf/nrf54h/Kconfig.soc
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@ -0,0 +1,37 @@
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# Nordic Semiconductor nRF54H MCU line
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# Copyright (c) 2024 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config SOC_NRF54H20
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bool "nRF54H20"
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depends on SOC_SERIES_NRF54HX
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if SOC_NRF54H20
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choice
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prompt "nRF54H20 MCU Selection"
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config SOC_NRF54H20_ENGA_CPUAPP
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bool "nRF54H20 ENGA CPUAPP"
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select CPU_HAS_ARM_MPU
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select CPU_HAS_ARM_SAU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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select CPU_HAS_FPU
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config SOC_NRF54H20_ENGA_CPURAD
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bool "nRF54H20 ENGA CPURAD"
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select CPU_HAS_ARM_MPU
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select CPU_HAS_ARM_SAU
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select CPU_HAS_DCACHE
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select CPU_HAS_ICACHE
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select CPU_HAS_FPU
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endchoice
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config NRF_ENABLE_ICACHE
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bool "Instruction cache (I-Cache)"
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default y
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endif # SOC_NRF54H20
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10
soc/arm/nordic_nrf/nrf54h/align.ld
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10
soc/arm/nordic_nrf/nrf54h/align.ld
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA.
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* SPDX-License-Identifier: Apache-2.0
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*/
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SECTION_PROLOGUE(.align16,,)
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{
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. = (ALIGN(16) > 0 ? ALIGN(16) : 16) - 1;
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BYTE(0);
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} GROUP_LINK_IN(ROMABLE_REGION)
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soc/arm/nordic_nrf/nrf54h/soc.c
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soc/arm/nordic_nrf/nrf54h/soc.c
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/cache.h>
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#include <zephyr/devicetree.h>
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#include <zephyr/init.h>
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#include <zephyr/kernel.h>
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#include <zephyr/logging/log.h>
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#include <hal/nrf_hsfll.h>
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#include <hal/nrf_lrcconf.h>
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#include <soc/nrfx_coredep.h>
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LOG_MODULE_REGISTER(soc, CONFIG_SOC_LOG_LEVEL);
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#if defined(NRF_APPLICATION)
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#define HSFLL_NODE DT_NODELABEL(cpuapp_hsfll)
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#elif defined(NRF_RADIOCORE)
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#define HSFLL_NODE DT_NODELABEL(cpurad_hsfll)
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#endif
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#define FICR_ADDR_GET(node_id, name) \
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DT_REG_ADDR(DT_PHANDLE_BY_NAME(node_id, nordic_ficrs, name)) + \
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DT_PHA_BY_NAME(node_id, nordic_ficrs, name, offset)
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static void power_domain_init(void)
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{
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/*
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* Set:
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* - LRCCONF010.POWERON.MAIN: 1
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* - LRCCONF010.POWERON.ACT: 1
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* - LRCCONF010.RETAIN.MAIN: 1
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* - LRCCONF010.RETAIN.ACT: 1
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*
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* This is done here at boot so that when the idle routine will hit
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* WFI the power domain will be correctly retained.
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*/
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nrf_lrcconf_poweron_force_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_MAIN, true);
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nrf_lrcconf_poweron_force_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_0, true);
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nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_MAIN, true);
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nrf_lrcconf_retain_set(NRF_LRCCONF010, NRF_LRCCONF_POWER_DOMAIN_0, true);
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#if defined(CONFIG_SOC_NRF54H20_ENGA_CPUAPP)
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nrf_lrcconf_poweron_force_set(NRF_LRCCONF000, NRF_LRCCONF_POWER_DOMAIN_0, true);
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#endif
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}
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static int trim_hsfll(void)
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{
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NRF_HSFLL_Type *hsfll = (NRF_HSFLL_Type *)DT_REG_ADDR(HSFLL_NODE);
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nrf_hsfll_trim_t trim = {
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.vsup = sys_read32(FICR_ADDR_GET(HSFLL_NODE, vsup)),
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.coarse = sys_read32(FICR_ADDR_GET(HSFLL_NODE, coarse)),
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.fine = sys_read32(FICR_ADDR_GET(HSFLL_NODE, fine))
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};
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LOG_DBG("Trim: HSFLL VSUP: 0x%.8x", trim.vsup);
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LOG_DBG("Trim: HSFLL COARSE: 0x%.8x", trim.coarse);
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LOG_DBG("Trim: HSFLL FINE: 0x%.8x", trim.fine);
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nrf_hsfll_clkctrl_mult_set(hsfll,
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DT_PROP(HSFLL_NODE, clock_frequency) /
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DT_PROP(DT_CLOCKS_CTLR(HSFLL_NODE), clock_frequency));
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nrf_hsfll_trim_set(hsfll, &trim);
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nrf_hsfll_task_trigger(hsfll, NRF_HSFLL_TASK_FREQ_CHANGE);
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#if defined(CONFIG_SOC_NRF54H20_ENGA_CPUAPP) || defined(CONFIG_SOC_NRF54H20_ENGA_CPURAD)
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/* In this HW revision, HSFLL task frequency change needs to be
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* triggered additional time to take effect.
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*/
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nrf_hsfll_task_trigger(hsfll, NRF_HSFLL_TASK_FREQ_CHANGE);
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#endif
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LOG_DBG("NRF_HSFLL->TRIM.VSUP = %d", hsfll->TRIM.VSUP);
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LOG_DBG("NRF_HSFLL->TRIM.COARSE = %d", hsfll->TRIM.COARSE);
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LOG_DBG("NRF_HSFLL->TRIM.FINE = %d", hsfll->TRIM.FINE);
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return 0;
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}
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static int nordicsemi_nrf54h_init(void)
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{
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#if defined(CONFIG_NRF_ENABLE_ICACHE)
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sys_cache_instr_enable();
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#endif
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power_domain_init();
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trim_hsfll();
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return 0;
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}
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void arch_busy_wait(uint32_t time_us)
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{
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nrfx_coredep_delay_us(time_us);
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}
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SYS_INIT(nordicsemi_nrf54h_init, PRE_KERNEL_1, 0);
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12
soc/arm/nordic_nrf/nrf54h/soc.h
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12
soc/arm/nordic_nrf/nrf54h/soc.h
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/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef SOC_ARM_NORDIC_NRF_NRF54H_SOC_H_
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#define SOC_ARM_NORDIC_NRF_NRF54H_SOC_H_
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#include <soc_nrf_common.h>
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#endif /* SOC_ARM_NORDIC_NRF_NRF54H_SOC_H_ */
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