drivers: clock_control: lpc: syscon: add MCAN clock support
Add support for the LPC MCAN clock to the LPC SYSCON clock controller driver. Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
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12388b9965
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abaf7cc70d
2 changed files with 20 additions and 1 deletions
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@ -18,6 +18,14 @@ LOG_MODULE_REGISTER(clock_control);
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static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
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static int mcux_lpc_syscon_clock_control_on(const struct device *dev,
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clock_control_subsys_t sub_system)
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clock_control_subsys_t sub_system)
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{
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{
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#if defined(CONFIG_CAN_MCUX_MCAN)
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uint32_t clock_name = (uint32_t)sub_system;
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if (clock_name == MCUX_MCAN_CLK) {
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CLOCK_EnableClock(kCLOCK_Mcan);
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}
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#endif /* defined(CONFIG_CAN_MCUX_MCAN) */
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return 0;
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return 0;
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}
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}
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@ -35,11 +43,15 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
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#if defined(CONFIG_I2C_MCUX_FLEXCOMM) || \
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#if defined(CONFIG_I2C_MCUX_FLEXCOMM) || \
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defined(CONFIG_SPI_MCUX_FLEXCOMM) || \
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defined(CONFIG_SPI_MCUX_FLEXCOMM) || \
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defined(CONFIG_UART_MCUX_FLEXCOMM) || \
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defined(CONFIG_UART_MCUX_FLEXCOMM) || \
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defined(CONFIG_COUNTER_MCUX_CTIMER)
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defined(CONFIG_COUNTER_MCUX_CTIMER) || \
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defined(CONFIG_CAN_MCUX_MCAN)
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uint32_t clock_name = (uint32_t) sub_system;
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uint32_t clock_name = (uint32_t) sub_system;
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switch (clock_name) {
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switch (clock_name) {
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#if defined(CONFIG_I2C_MCUX_FLEXCOMM) || \
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defined(CONFIG_SPI_MCUX_FLEXCOMM) || \
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defined(CONFIG_UART_MCUX_FLEXCOMM)
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case MCUX_FLEXCOMM0_CLK:
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case MCUX_FLEXCOMM0_CLK:
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*rate = CLOCK_GetFlexCommClkFreq(0);
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*rate = CLOCK_GetFlexCommClkFreq(0);
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break;
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break;
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@ -84,6 +96,11 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
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*rate = CLOCK_GetSdioClkFreq(1);
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*rate = CLOCK_GetSdioClkFreq(1);
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break;
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break;
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#endif
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#endif
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#if defined(CONFIG_CAN_MCUX_MCAN)
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case MCUX_MCAN_CLK:
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*rate = CLOCK_GetMCanClkFreq();
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break;
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#endif /* defined(CONFIG_CAN_MCUX_MCAN) */
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#if defined(CONFIG_COUNTER_MCUX_CTIMER)
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#if defined(CONFIG_COUNTER_MCUX_CTIMER)
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case (MCUX_CTIMER0_CLK + MCUX_CTIMER_CLK_OFFSET):
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case (MCUX_CTIMER0_CLK + MCUX_CTIMER_CLK_OFFSET):
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*rate = CLOCK_GetCTimerClkFreq(0);
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*rate = CLOCK_GetCTimerClkFreq(0);
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@ -102,6 +119,7 @@ static int mcux_lpc_syscon_clock_control_get_subsys_rate(
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break;
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break;
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#endif
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#endif
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}
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}
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#endif
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#endif
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#endif
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return 0;
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return 0;
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@ -17,6 +17,7 @@
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#define MCUX_FLEXCOMM7_CLK 7
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#define MCUX_FLEXCOMM7_CLK 7
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#define MCUX_PMIC_I2C_CLK 16
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#define MCUX_PMIC_I2C_CLK 16
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#define MCUX_HS_SPI_CLK 8
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#define MCUX_HS_SPI_CLK 8
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#define MCUX_MCAN_CLK 9
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#define MCUX_USDHC1_CLK 9
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#define MCUX_USDHC1_CLK 9
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#define MCUX_USDHC2_CLK 10
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#define MCUX_USDHC2_CLK 10
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