driver: esp32: I2C code refactoring
Use i2c_hal functions to enable support for multiple SoCs. Use DT compat to enable I2C from device tree configuration Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
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0931dd1d53
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13 changed files with 566 additions and 493 deletions
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@ -21,6 +21,7 @@
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aliases {
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sw0 = &user_button1;
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i2c-0 = &i2c0;
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};
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gpio_keys {
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@ -43,6 +44,13 @@
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rx-pin = <3>;
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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sda-pin = <2>;
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scl-pin = <3>;
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};
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&trng0 {
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status = "okay";
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};
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@ -13,4 +13,5 @@ CONFIG_PINMUX=y
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CONFIG_PINMUX_ESP32=y
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CONFIG_GPIO=y
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CONFIG_GPIO_ESP32=y
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CONFIG_I2C=y
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CONFIG_CLOCK_CONTROL=y
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@ -69,13 +69,13 @@
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&i2c0 {
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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sda-pin = <21>;
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scl-pin = <22>;
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};
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&i2c1 {
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clock-frequency = <I2C_BITRATE_FAST>;
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clock-frequency = <I2C_BITRATE_STANDARD>;
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sda-pin = <18>;
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scl-pin = <5>;
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};
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@ -25,9 +25,6 @@ CONFIG_GEN_ISR_TABLES=y
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CONFIG_GEN_IRQ_VECTOR_TABLE=n
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CONFIG_I2C=y
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CONFIG_I2C_ESP32=y
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CONFIG_I2C_0=y
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CONFIG_I2C_1=y
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CONFIG_CLOCK_CONTROL=y
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CONFIG_BOOTLOADER_ESP_IDF=y
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@ -12,6 +12,10 @@
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model = "esp32s2_saola";
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compatible = "espressif,esp32s2";
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aliases {
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i2c-0 = &i2c0;
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};
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chosen {
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zephyr,sram = &sram0;
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zephyr,console = &uart0;
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@ -55,6 +59,19 @@
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <I2C_BITRATE_STANDARD>;
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sda-pin = <8>;
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scl-pin = <9>;
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};
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&i2c1 {
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clock-frequency = <I2C_BITRATE_STANDARD>;
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sda-pin = <3>;
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scl-pin = <4>;
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};
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&trng0 {
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status = "okay";
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};
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@ -23,6 +23,7 @@ CONFIG_GPIO_ESP32=y
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CONFIG_GEN_ISR_TABLES=y
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CONFIG_GEN_IRQ_VECTOR_TABLE=n
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CONFIG_I2C=y
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CONFIG_CLOCK_CONTROL=y
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CONFIG_BOOTLOADER_ESP_IDF=y
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@ -26,5 +26,3 @@ CONFIG_GEN_ISR_TABLES=y
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CONFIG_GEN_IRQ_VECTOR_TABLE=n
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CONFIG_I2C=y
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CONFIG_I2C_ESP32=y
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CONFIG_I2C_0=y
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@ -1,45 +1,15 @@
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# ESP32 I2C configuration options
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# Copyright (c) 2017 Intel Corporation
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# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
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# SPDX-License-Identifier: Apache-2.0
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menuconfig I2C_ESP32
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bool "ESP32 I2C"
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depends on SOC_ESP32
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DT_COMPAT_ESP32_I2C := espressif,esp32-i2c
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config I2C_ESP32
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bool "ESP32 I2C driver"
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depends on SOC_ESP32 || SOC_ESP32S2 || SOC_ESP32C3
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default $(dt_compat_enabled,$(DT_COMPAT_ESP32_I2C))
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select GPIO_ESP32
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help
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Enables the ESP32 I2C driver
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if I2C_ESP32
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config I2C_0
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bool "Enable I2C Port 0"
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config I2C_1
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bool "Enable I2C Port 1"
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config I2C_ESP32_TIMEOUT
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int "I2C timeout to receive a data bit in APB clock cycles"
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default 200000
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if I2C_0
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config I2C_ESP32_0_TX_LSB_FIRST
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bool "Port 0 Transmit LSB first"
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config I2C_ESP32_0_RX_LSB_FIRST
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bool "Port 0 Receive LSB first"
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endif # I2C_0
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if I2C_1
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config I2C_ESP32_1_TX_LSB_FIRST
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bool "Port 1 Transmit LSB first"
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config I2C_ESP32_1_RX_LSB_FIRST
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bool "Port 1 Receive LSB first"
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endif # I2C_1
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endif # I2C_ESP32
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File diff suppressed because it is too large
Load diff
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@ -23,3 +23,13 @@ properties:
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type: int
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description: SCL pin
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required: true
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tx-lsb:
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type: boolean
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required: false
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description: Set I2C TX data as LSB
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rx-lsb:
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type: boolean
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required: false
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description: Set I2C RX data as LSB
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@ -5,12 +5,14 @@
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*/
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#include <mem.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/interrupt-controller/esp-esp32c3-intmux.h>
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#include <dt-bindings/clock/esp32c3_clock.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {
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zephyr,entropy = &trng0;
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zephyr,flash-controller = &flash;
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@ -98,6 +100,18 @@
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ngpios = <32>; /* 0..31 */
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};
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i2c0: i2c@60013000 {
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compatible = "espressif,esp32-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x60013000 0x1000>;
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interrupts = <I2C_EXT0_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "I2C_0";
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clocks = <&rtc ESP32_I2C0_MODULE>;
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status = "disabled";
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};
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uart0: uart@60000000 {
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compatible = "espressif,esp32-uart";
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reg = <0x60000000 0x400>;
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@ -6,6 +6,7 @@
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#include <mem.h>
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#include <xtensa/xtensa.dtsi>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/clock/esp32s2_clock.h>
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#include <dt-bindings/interrupt-controller/esp32s2-xtensa-intmux.h>
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@ -131,6 +132,30 @@
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ngpios = <22>; /* 32..53 */
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};
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i2c0: i2c@3f413000 {
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compatible = "espressif,esp32-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3f413000 0x1000>;
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interrupts = <I2C_EXT0_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "I2C_0";
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clocks = <&rtc ESP32_I2C0_MODULE>;
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status = "disabled";
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};
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i2c1: i2c@3f427000 {
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compatible = "espressif,esp32-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3f427000 0x1000>;
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interrupts = <I2C_EXT1_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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label = "I2C_1";
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clocks = <&rtc ESP32_I2C1_MODULE>;
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status = "disabled";
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};
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timer0: counter@3f41f000 {
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compatible = "espressif,esp32-timer";
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reg = <0x3f41f000 DT_SIZE_K(4)>;
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@ -49,6 +49,11 @@ uint32_t soc_intr_get_next_source(void);
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extern void esp_rom_Cache_Resume_ICache(uint32_t autoload);
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extern int esp_rom_Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
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extern spiflash_legacy_data_t esp_rom_spiflash_legacy_data;
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extern int esp_rom_gpio_matrix_in(uint32_t gpio, uint32_t signal_index,
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bool inverted);
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extern int esp_rom_gpio_matrix_out(uint32_t gpio, uint32_t signal_index,
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bool out_inverted,
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bool out_enabled_inverted);
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#endif /* _ASMLANGUAGE */
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