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driver: esp32: I2C code refactoring

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Use i2c_hal functions to enable support for
multiple SoCs.

Use DT compat to enable I2C from device
tree configuration

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This commit is contained in:
Sylvio Alves 2021-10-20 01:15:01 -03:00 • committed by Christopher Friedt
commit ab91612a6d
13 changed files with 566 additions and 493 deletions
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8
boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
View file

@ -21,6 +21,7 @@
aliases {
sw0 = &user_button1;
i2c-0 = &i2c0;
};
gpio_keys {
@ -43,6 +44,13 @@
rx-pin = <3>;
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
sda-pin = <2>;
scl-pin = <3>;
};
&trng0 {
status = "okay";
};

1
boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig
View file

@ -13,4 +13,5 @@ CONFIG_PINMUX=y
CONFIG_PINMUX_ESP32=y
CONFIG_GPIO=y
CONFIG_GPIO_ESP32=y
CONFIG_I2C=y
CONFIG_CLOCK_CONTROL=y

4
boards/xtensa/esp32/esp32.dts
View file

@ -69,13 +69,13 @@
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
clock-frequency = <I2C_BITRATE_STANDARD>;
sda-pin = <21>;
scl-pin = <22>;
};
&i2c1 {
clock-frequency = <I2C_BITRATE_FAST>;
clock-frequency = <I2C_BITRATE_STANDARD>;
sda-pin = <18>;
scl-pin = <5>;
};

3
boards/xtensa/esp32/esp32_defconfig
View file

@ -25,9 +25,6 @@ CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n
CONFIG_I2C=y
CONFIG_I2C_ESP32=y
CONFIG_I2C_0=y
CONFIG_I2C_1=y
CONFIG_CLOCK_CONTROL=y
CONFIG_BOOTLOADER_ESP_IDF=y

17
boards/xtensa/esp32s2_saola/esp32s2_saola.dts
View file

@ -12,6 +12,10 @@
model = "esp32s2_saola";
compatible = "espressif,esp32s2";
aliases {
i2c-0 = &i2c0;
};
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart0;
@ -55,6 +59,19 @@
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
sda-pin = <8>;
scl-pin = <9>;
};
&i2c1 {
clock-frequency = <I2C_BITRATE_STANDARD>;
sda-pin = <3>;
scl-pin = <4>;
};
&trng0 {
status = "okay";
};

1
boards/xtensa/esp32s2_saola/esp32s2_saola_defconfig
View file

@ -23,6 +23,7 @@ CONFIG_GPIO_ESP32=y
CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n
CONFIG_I2C=y
CONFIG_CLOCK_CONTROL=y
CONFIG_BOOTLOADER_ESP_IDF=y

2
boards/xtensa/odroid_go/odroid_go_defconfig
View file

@ -26,5 +26,3 @@ CONFIG_GEN_ISR_TABLES=y
CONFIG_GEN_IRQ_VECTOR_TABLE=n
CONFIG_I2C=y
CONFIG_I2C_ESP32=y
CONFIG_I2C_0=y

44
drivers/i2c/Kconfig.esp32
View file

@ -1,45 +1,15 @@
# ESP32 I2C configuration options
# Copyright (c) 2017 Intel Corporation
# Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
# SPDX-License-Identifier: Apache-2.0
menuconfig I2C_ESP32
bool "ESP32 I2C"
depends on SOC_ESP32
DT_COMPAT_ESP32_I2C := espressif,esp32-i2c
config I2C_ESP32
bool "ESP32 I2C driver"
depends on SOC_ESP32 || SOC_ESP32S2 || SOC_ESP32C3
default $(dt_compat_enabled,$(DT_COMPAT_ESP32_I2C))
select GPIO_ESP32
help
Enables the ESP32 I2C driver
if I2C_ESP32
config I2C_0
bool "Enable I2C Port 0"
config I2C_1
bool "Enable I2C Port 1"
config I2C_ESP32_TIMEOUT
int "I2C timeout to receive a data bit in APB clock cycles"
default 200000
if I2C_0
config I2C_ESP32_0_TX_LSB_FIRST
bool "Port 0 Transmit LSB first"
config I2C_ESP32_0_RX_LSB_FIRST
bool "Port 0 Receive LSB first"
endif # I2C_0
if I2C_1
config I2C_ESP32_1_TX_LSB_FIRST
bool "Port 1 Transmit LSB first"
config I2C_ESP32_1_RX_LSB_FIRST
bool "Port 1 Receive LSB first"
endif # I2C_1
endif # I2C_ESP32

925
drivers/i2c/i2c_esp32.c
View file

File diff suppressed because it is too large Load diff

10
dts/bindings/i2c/espressif,esp32-i2c.yaml
View file

@ -23,3 +23,13 @@ properties:
type: int
description: SCL pin
required: true
tx-lsb:
type: boolean
required: false
description: Set I2C TX data as LSB
rx-lsb:
type: boolean
required: false
description: Set I2C RX data as LSB

14
dts/riscv/espressif/esp32c3.dtsi
View file

@ -5,12 +5,14 @@
*/
#include <mem.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/interrupt-controller/esp-esp32c3-intmux.h>
#include <dt-bindings/clock/esp32c3_clock.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen {
zephyr,entropy = &trng0;
zephyr,flash-controller = &flash;
@ -98,6 +100,18 @@
ngpios = <32>; /* 0..31 */
};
i2c0: i2c@60013000 {
compatible = "espressif,esp32-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x60013000 0x1000>;
interrupts = <I2C_EXT0_INTR_SOURCE>;
interrupt-parent = <&intc>;
label = "I2C_0";
clocks = <&rtc ESP32_I2C0_MODULE>;
status = "disabled";
};
uart0: uart@60000000 {
compatible = "espressif,esp32-uart";
reg = <0x60000000 0x400>;

25
dts/xtensa/espressif/esp32s2.dtsi
View file

@ -6,6 +6,7 @@
#include <mem.h>
#include <xtensa/xtensa.dtsi>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/clock/esp32s2_clock.h>
#include <dt-bindings/interrupt-controller/esp32s2-xtensa-intmux.h>
@ -131,6 +132,30 @@
ngpios = <22>; /* 32..53 */
};
i2c0: i2c@3f413000 {
compatible = "espressif,esp32-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3f413000 0x1000>;
interrupts = <I2C_EXT0_INTR_SOURCE>;
interrupt-parent = <&intc>;
label = "I2C_0";
clocks = <&rtc ESP32_I2C0_MODULE>;
status = "disabled";
};
i2c1: i2c@3f427000 {
compatible = "espressif,esp32-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x3f427000 0x1000>;
interrupts = <I2C_EXT1_INTR_SOURCE>;
interrupt-parent = <&intc>;
label = "I2C_1";
clocks = <&rtc ESP32_I2C1_MODULE>;
status = "disabled";
};
timer0: counter@3f41f000 {
compatible = "espressif,esp32-timer";
reg = <0x3f41f000 DT_SIZE_K(4)>;

5
soc/riscv/esp32c3/soc.h
View file

@ -49,6 +49,11 @@ uint32_t soc_intr_get_next_source(void);
extern void esp_rom_Cache_Resume_ICache(uint32_t autoload);
extern int esp_rom_Cache_Invalidate_Addr(uint32_t addr, uint32_t size);
extern spiflash_legacy_data_t esp_rom_spiflash_legacy_data;
extern int esp_rom_gpio_matrix_in(uint32_t gpio, uint32_t signal_index,
bool inverted);
extern int esp_rom_gpio_matrix_out(uint32_t gpio, uint32_t signal_index,
bool out_inverted,
bool out_enabled_inverted);
#endif /* _ASMLANGUAGE */