diff --git a/soc/nordic/common/vpr/CMakeLists.txt b/soc/nordic/common/vpr/CMakeLists.txt index d418954eebc..2e347429bd2 100644 --- a/soc/nordic/common/vpr/CMakeLists.txt +++ b/soc/nordic/common/vpr/CMakeLists.txt @@ -3,6 +3,6 @@ zephyr_include_directories(.) -zephyr_library_sources(soc_idle.c soc_irq.S soc_irq.c vector.S) +zephyr_library_sources(soc_context.S soc_idle.c) set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/riscv/common/linker.ld CACHE INTERNAL "") diff --git a/soc/nordic/common/vpr/Kconfig b/soc/nordic/common/vpr/Kconfig index 35d203c42dc..d3a8b7f5261 100644 --- a/soc/nordic/common/vpr/Kconfig +++ b/soc/nordic/common/vpr/Kconfig @@ -5,14 +5,17 @@ config RISCV_CORE_NORDIC_VPR bool "RISC-V Nordic VPR core" default y depends on DT_HAS_NORDIC_VPR_ENABLED - select RISCV select ATOMIC_OPERATIONS_C + select RISCV + select RISCV_PRIVILEGED + select RISCV_VECTORED_MODE select RISCV_ISA_RV32E select RISCV_ISA_EXT_M select RISCV_ISA_EXT_C select RISCV_ISA_EXT_ZICSR select RISCV_ISA_EXT_ZIFENCEI select RISCV_SOC_HAS_ISR_STACKING + select RISCV_HAS_CLIC select RISCV_SOC_CONTEXT_SAVE select HAS_FLASH_LOAD_OFFSET select ARCH_CPU_IDLE_CUSTOM diff --git a/soc/nordic/common/vpr/soc_irq.S b/soc/nordic/common/vpr/soc_context.S similarity index 73% rename from soc/nordic/common/vpr/soc_irq.S rename to soc/nordic/common/vpr/soc_context.S index 0e9db48d9b4..82c8ecfe598 100644 --- a/soc/nordic/common/vpr/soc_irq.S +++ b/soc/nordic/common/vpr/soc_context.S @@ -6,17 +6,9 @@ #include #include -/* Exports */ -GTEXT(__soc_handle_irq) GTEXT(__soc_save_context) GTEXT(__soc_restore_context) -/* - * No need to clear anything, pending bit is cleared by HW. - */ -SECTION_FUNC(exception.other, __soc_handle_irq) - ret - SECTION_FUNC(exception.other, __soc_save_context) csrr t0, 0x347 sw t0, __soc_esf_t_minttresh_OFFSET(a0) diff --git a/soc/nordic/common/vpr/soc_irq.c b/soc/nordic/common/vpr/soc_irq.c deleted file mode 100644 index 88655f6efa0..00000000000 --- a/soc/nordic/common/vpr/soc_irq.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2024 Nordic Semiconductor ASA - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -void arch_irq_enable(unsigned int irq) -{ - nrf_vpr_clic_int_enable_set(NRF_VPRCLIC, irq, true); -} - -void arch_irq_disable(unsigned int irq) -{ - nrf_vpr_clic_int_enable_set(NRF_VPRCLIC, irq, false); -} - -void arch_irq_priority_set(unsigned int irq, unsigned int prio) -{ - nrf_vpr_clic_int_priority_set(NRF_VPRCLIC, irq, prio); -} - -int arch_irq_is_enabled(unsigned int irq) -{ - return nrf_vpr_clic_int_enable_check(NRF_VPRCLIC, irq); -} diff --git a/soc/nordic/common/vpr/vector.S b/soc/nordic/common/vpr/vector.S deleted file mode 100644 index 84feb3e56b3..00000000000 --- a/soc/nordic/common/vpr/vector.S +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2024 Nordic Semiconductor ASA - * SPDX-License-Identifier: Apache-2.0 - */ - -#include - -/* Imports */ -GTEXT(__initialize) - -/* Exports */ -GTEXT(__start) - -SECTION_FUNC(vectors, __start) - /* Set mtvec.base (mtvec.mode is RO, no need to mask it). */ - la t0, _isr_wrapper - csrw mtvec, t0 - - /* Set mtvt. */ - la t0, _irq_vector_table - csrw 0x307, t0 - - /* Call into Zephyr initialization. */ - tail __initialize