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driver/sensor: lis2dw12: make use of STdC definitions

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Port the lis2dw12 sensor driver on top of the lis2dw12_StdC
HAL interface (in modules/hal/st/sensor/stmemsc/).

Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit is contained in:
Armando Visconti 2019-04-29 16:13:49 +02:00 • committed by Anas Nashif
commit ab4f280661
11 changed files with 124 additions and 283 deletions
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2
drivers/sensor/lis2dw12/Kconfig
View file

@ -8,6 +8,8 @@
menuconfig LIS2DW12
bool "LIS2DW12 I2C/SPI accelerometer sensor driver"
depends on (I2C && HAS_DTS_I2C) || (SPI && HAS_DTS_SPI)
select HAS_STMEMSC
select USE_STDC_LIS2DW12
help
Enable driver for LIS2DW12 accelerometer sensor driver

94
drivers/sensor/lis2dw12/lis2dw12.c
View file

@ -36,12 +36,11 @@ static int lis2dw12_set_range(struct device *dev, u16_t range)
struct lis2dw12_data *lis2dw12 = dev->driver_data;
const struct lis2dw12_device_config *cfg = dev->config->config_info;
u8_t shift_gain = 0U;
u8_t fs = LIS2DW12_FS_TO_REG(range);
err = lis2dw12->hw_tf->update_reg(lis2dw12, LIS2DW12_CTRL6_ADDR,
LIS2DW12_FS_MASK,
LIS2DW12_FS_TO_REG(range));
err = lis2dw12_full_scale_set(lis2dw12->ctx, fs);
if (cfg->pm == LIS2DW12_LOW_POWER_M1) {
if (cfg->pm == LIS2DW12_CONT_LOW_PWR_12bit) {
shift_gain = LIS2DW12_SHFT_GAIN_NOLP1;
}
@ -63,23 +62,21 @@ static int lis2dw12_set_range(struct device *dev, u16_t range)
static int lis2dw12_set_odr(struct device *dev, u16_t odr)
{
struct lis2dw12_data *lis2dw12 = dev->driver_data;
u8_t val;
/* check if power off */
if (odr == 0U) {
return lis2dw12->hw_tf->update_reg(lis2dw12,
LIS2DW12_CTRL1_ADDR,
LIS2DW12_ODR_MASK,
LIS2DW12_ODR_POWER_OFF_VAL);
return lis2dw12_data_rate_set(lis2dw12->ctx,
LIS2DW12_XL_ODR_OFF);
}
if (odr > LIS2DW12_MAX_ODR) {
val = LIS2DW12_ODR_TO_REG(odr);
if (val > LIS2DW12_XL_ODR_1k6Hz) {
LOG_ERR("ODR too high");
return -ENOTSUP;
}
return lis2dw12->hw_tf->update_reg(lis2dw12, LIS2DW12_CTRL1_ADDR,
LIS2DW12_ODR_MASK,
LIS2DW12_ODR_TO_REG(odr));
return lis2dw12_data_rate_set(lis2dw12->ctx, val);
}
static inline void lis2dw12_convert(struct sensor_value *val, int raw_val,
@ -182,39 +179,24 @@ static int lis2dw12_sample_fetch(struct device *dev, enum sensor_channel chan)
struct lis2dw12_data *lis2dw12 = dev->driver_data;
const struct lis2dw12_device_config *cfg = dev->config->config_info;
u8_t shift;
union {
u8_t raw[6];
struct {
s16_t a_axis[3];
};
} buf __aligned(2);
u8_t tmp;
if (lis2dw12->hw_tf->read_reg(lis2dw12, LIS2DW12_STATUS_REG, &tmp)) {
return -EIO;
}
if (!(tmp & LIS2DW12_STS_XLDA_UP)) {
return -EAGAIN;
}
axis3bit16_t buf;
/* fetch raw data sample */
if (lis2dw12->hw_tf->read_data(lis2dw12, LIS2DW12_OUT_X_L_ADDR,
buf.raw, sizeof(buf)) < 0) {
if (lis2dw12_acceleration_raw_get(lis2dw12->ctx, buf.u8bit) < 0) {
LOG_DBG("Failed to fetch raw data sample");
return -EIO;
}
/* adjust to resolution */
if (cfg->pm == LIS2DW12_LOW_POWER_M1) {
if (cfg->pm == LIS2DW12_CONT_LOW_PWR_12bit) {
shift = LIS2DW12_SHIFT_PM1;
} else {
shift = LIS2DW12_SHIFT_PMOTHER;
}
lis2dw12->acc[0] = sys_le16_to_cpu(buf.a_axis[0]) >> shift;
lis2dw12->acc[1] = sys_le16_to_cpu(buf.a_axis[1]) >> shift;
lis2dw12->acc[2] = sys_le16_to_cpu(buf.a_axis[2]) >> shift;
lis2dw12->acc[0] = sys_le16_to_cpu(buf.i16bit[0]) >> shift;
lis2dw12->acc[1] = sys_le16_to_cpu(buf.i16bit[1]) >> shift;
lis2dw12->acc[2] = sys_le16_to_cpu(buf.i16bit[2]) >> shift;
return 0;
}
@ -251,30 +233,23 @@ static int lis2dw12_init_interface(struct device *dev)
}
static int lis2dw12_set_power_mode(struct lis2dw12_data *lis2dw12,
enum lis2dh_powermode pm)
lis2dw12_mode_t pm)
{
u8_t regval = LIS2DW12_LOW_POWER_M1 | LIS2DW12_LOW_POWER_MODE;
u8_t regval = LIS2DW12_CONT_LOW_PWR_12bit;
switch (pm) {
case LIS2DW12_LOW_POWER_M2:
regval = LIS2DW12_LOW_POWER_M2 | LIS2DW12_LOW_POWER_MODE;
break;
case LIS2DW12_LOW_POWER_M3:
regval = LIS2DW12_LOW_POWER_M3 | LIS2DW12_LOW_POWER_MODE;
break;
case LIS2DW12_LOW_POWER_M4:
regval = LIS2DW12_LOW_POWER_M4 | LIS2DW12_LOW_POWER_MODE;
break;
case LIS2DW12_HIGH_PERF:
regval = LIS2DW12_HP_MODE;
case LIS2DW12_CONT_LOW_PWR_2:
case LIS2DW12_CONT_LOW_PWR_3:
case LIS2DW12_CONT_LOW_PWR_4:
case LIS2DW12_HIGH_PERFORMANCE:
regval = pm;
break;
default:
LOG_DBG("Apply default Power Mode");
break;
}
return lis2dw12->hw_tf->write_reg(lis2dw12, LIS2DW12_CTRL1_ADDR,
regval);
return lis2dw12_write_reg(lis2dw12->ctx, LIS2DW12_CTRL1, &regval, 1);
}
static int lis2dw12_init(struct device *dev)
@ -288,27 +263,24 @@ static int lis2dw12_init(struct device *dev)
}
/* check chip ID */
if (lis2dw12->hw_tf->read_reg(lis2dw12, LIS2DW12_WHO_AM_I_REG,
&wai) < 0) {
LOG_ERR("Failed to read chip ID");
if (lis2dw12_device_id_get(lis2dw12->ctx, &wai) < 0) {
return -EIO;
}
if (wai != LIS2DW12_WHO_AM_I) {
if (wai != LIS2DW12_ID) {
LOG_ERR("Invalid chip ID");
return -EINVAL;
}
/* reset device */
if (lis2dw12->hw_tf->write_reg(lis2dw12, LIS2DW12_CTRL2_ADDR,
LIS2DW12_RESET_MASK)) {
if (lis2dw12_reset_set(lis2dw12->ctx, PROPERTY_ENABLE) < 0) {
return -EIO;
}
k_busy_wait(100);
if (lis2dw12->hw_tf->update_reg(lis2dw12, LIS2DW12_CTRL2_ADDR,
LIS2DW12_BDU_MASK, LIS2DW12_EN_BIT)) {
if (lis2dw12_block_data_update_set(lis2dw12->ctx,
PROPERTY_ENABLE) < 0) {
return -EIO;
}
@ -318,21 +290,17 @@ static int lis2dw12_init(struct device *dev)
}
/* set default odr and full scale for acc */
if (lis2dw12->hw_tf->update_reg(lis2dw12, LIS2DW12_CTRL1_ADDR,
LIS2DW12_ODR_MASK,
LIS2DW12_DEFAULT_ODR)) {
if (lis2dw12_data_rate_set(lis2dw12->ctx, LIS2DW12_DEFAULT_ODR) < 0) {
return -EIO;
}
if (lis2dw12->hw_tf->update_reg(lis2dw12, LIS2DW12_CTRL6_ADDR,
LIS2DW12_FS_MASK,
LIS2DW12_ACC_FS)) {
if (lis2dw12_full_scale_set(lis2dw12->ctx, LIS2DW12_ACC_FS) < 0) {
return -EIO;
}
lis2dw12->gain =
LIS2DW12_FS_TO_GAIN(LIS2DW12_ACC_FS,
cfg->pm == LIS2DW12_LOW_POWER_M1 ?
cfg->pm == LIS2DW12_CONT_LOW_PWR_12bit ?
LIS2DW12_SHFT_GAIN_NOLP1 : 0);
#ifdef CONFIG_LIS2DW12_TRIGGER

122
drivers/sensor/lis2dw12/lis2dw12.h
View file

@ -15,121 +15,49 @@
#include <gpio.h>
#include <misc/util.h>
#include <sensor.h>
/* COMMON DEFINE FOR ACCEL SENSOR */
#define LIS2DW12_EN_BIT 0x01
#define LIS2DW12_DIS_BIT 0x00
#define LIS2DW12_OUT_LEN 6
/* temperature sensor */
#define LIS2DW12_OUT_TEMP_L_ADDR 0x0d
/* Who Am I */
#define LIS2DW12_WHO_AM_I_REG 0x0f
#define LIS2DW12_WHO_AM_I 0x44
#define LIS2DW12_CTRL1_ADDR 0x20
#define LIS2DW12_LOW_POWER_MASK 0x03
#define LIS2DW12_POWER_MODE_MASK 0x0c
#define LIS2DW12_LOW_POWER_MODE 0x00
#define LIS2DW12_HP_MODE 0x04
#define LIS2DW12_ODR_MASK 0xf0
enum lis2dh_powermode {
LIS2DW12_LOW_POWER_M1,
LIS2DW12_LOW_POWER_M2,
LIS2DW12_LOW_POWER_M3,
LIS2DW12_LOW_POWER_M4,
LIS2DW12_HIGH_PERF
};
/* Acc data rate for Low Power mode */
#define LIS2DW12_MAX_ODR 1600
enum lis2dh_odr {
LIS2DW12_ODR_POWER_OFF_VAL,
LIS2DW12_ODR_1_6HZ_VAL,
LIS2DW12_ODR_12_5HZ_VAL,
LIS2DW12_ODR_25HZ_VAL,
LIS2DW12_ODR_50HZ_VAL,
LIS2DW12_ODR_100HZ_VAL,
LIS2DW12_ODR_200HZ_VAL,
LIS2DW12_ODR_400HZ_VAL,
LIS2DW12_ODR_800HZ_VAL,
LIS2DW12_ODR_1600HZ_VAL
};
#include "lis2dw12_reg.h"
#if defined(CONFIG_LIS2DW12_ODR_1_6)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_1_6HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_1Hz6_LP_ONLY
#elif defined(CONFIG_LIS2DW12_ODR_12_5)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_12_5HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_12Hz5
#elif defined(CONFIG_LIS2DW12_ODR_25)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_25HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_25Hz
#elif defined(CONFIG_LIS2DW12_ODR_50)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_50HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_50Hz
#elif defined(CONFIG_LIS2DW12_ODR_100) || \
defined(CONFIG_LIS2DW12_ODR_RUNTIME)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_100HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_100Hz
#elif defined(CONFIG_LIS2DW12_ODR_200)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_200HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_200Hz
#elif defined(CONFIG_LIS2DW12_ODR_400)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_400HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_400Hz
#elif defined(CONFIG_LIS2DW12_ODR_800)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_800HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_800Hz
#elif defined(CONFIG_LIS2DW12_ODR_1600)
#define LIS2DW12_DEFAULT_ODR LIS2DW12_ODR_1600HZ_VAL
#define LIS2DW12_DEFAULT_ODR LIS2DW12_XL_ODR_1k6Hz
#endif
/* Return ODR reg value based on data rate set */
#define LIS2DW12_ODR_TO_REG(_odr) \
((_odr <= 1) ? LIS2DW12_ODR_1_6HZ_VAL : \
(_odr <= 12) ? LIS2DW12_ODR_12_5HZ_VAL : \
((_odr <= 1) ? LIS2DW12_XL_ODR_1Hz6_LP_ONLY : \
(_odr <= 12) ? LIS2DW12_XL_ODR_12Hz5 : \
((31 - __builtin_clz(_odr / 25))) + 3)
#define LIS2DW12_CTRL2_ADDR 0x21
#define LIS2DW12_BDU_MASK BIT(3)
#define LIS2DW12_RESET_MASK BIT(6)
#define LIS2DW12_BOOT_MASK BIT(7)
#define LIS2DW12_CTRL3_ADDR 0x22
#define LIS2DW12_LIR_MASK BIT(4)
#define LIS2DW12_CTRL4_ADDR 0x23
#define LIS2DW12_INT1_DRDY BIT(0)
#define LIS2DW12_CTRL5_ADDR 0x24
#define LIS2DW12_INT2_DRDY BIT(0)
#define LIS2DW12_CTRL6_ADDR 0x25
#define LIS2DW12_FS_MASK 0x30
enum lis2dh_fs {
LIS2DW12_FS_2G_VAL,
LIS2DW12_FS_4G_VAL,
LIS2DW12_FS_8G_VAL,
LIS2DW12_FS_16G_VAL
};
/* FS reg value from Full Scale */
#define LIS2DW12_FS_TO_REG(_fs) (30 - __builtin_clz(_fs))
#if defined(CONFIG_LIS2DW12_ACCEL_RANGE_RUNTIME) || \
defined(CONFIG_LIS2DW12_ACCEL_RANGE_2G)
#define LIS2DW12_ACC_FS LIS2DW12_FS_2G_VAL
#define LIS2DW12_ACC_FS LIS2DW12_2g
#elif defined(CONFIG_LIS2DW12_ACCEL_RANGE_4G)
#define LIS2DW12_ACC_FS LIS2DW12_FS_4G_VAL
#define LIS2DW12_ACC_FS LIS2DW12_4g
#elif defined(CONFIG_LIS2DW12_ACCEL_RANGE_8G)
#define LIS2DW12_ACC_FS LIS2DW12_FS_8G_VAL
#define LIS2DW12_ACC_FS LIS2DW12_8g
#elif defined(CONFIG_LIS2DW12_ACCEL_RANGE_16G)
#define LIS2DW12_ACC_FS LIS2DW12_FS_16G_VAL
#define LIS2DW12_ACC_FS LIS2DW12_16g
#endif
#define LIS2DW12_OUT_T_REG 0x26
#define LIS2DW12_STATUS_REG 0x27
#define LIS2DW12_STS_XLDA_UP 0x01
#define LIS2DW12_OUT_X_L_ADDR 0x28
/* Acc Gain value in ug/LSB in High Perf mode */
#define LIS2DW12_FS_2G_GAIN 244
#define LIS2DW12_FS_4G_GAIN 488
@ -155,7 +83,7 @@ enum lis2dh_fs {
*/
struct lis2dw12_device_config {
const char *bus_name;
enum lis2dh_powermode pm;
lis2dw12_mode_t pm;
#ifdef CONFIG_LIS2DW12_TRIGGER
const char *int_gpio_port;
u8_t int_gpio_pin;
@ -166,20 +94,6 @@ struct lis2dw12_device_config {
/* sensor data forward declaration (member definition is below) */
struct lis2dw12_data;
/* transmission function interface */
struct lis2dw12_tf {
int (*read_data)(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len);
int (*write_data)(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len);
int (*read_reg)(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value);
int (*write_reg)(struct lis2dw12_data *data, u8_t reg_addr,
u8_t value);
int (*update_reg)(struct lis2dw12_data *data, u8_t reg_addr,
u8_t mask, u8_t value);
};
/* sensor data */
struct lis2dw12_data {
struct device *bus;
@ -188,7 +102,7 @@ struct lis2dw12_data {
/* save sensitivity */
u16_t gain;
const struct lis2dw12_tf *hw_tf;
lis2dw12_ctx_t *ctx;
#ifdef CONFIG_LIS2DW12_TRIGGER
struct device *gpio;
struct gpio_callback gpio_cb;

42
drivers/sensor/lis2dw12/lis2dw12_i2c.c
View file

@ -21,55 +21,31 @@ static u16_t lis2dw12_i2c_slave_addr = DT_INST_0_ST_LIS2DW12_BASE_ADDRESS;
#define LOG_LEVEL CONFIG_SENSOR_LOG_LEVEL
LOG_MODULE_DECLARE(LIS2DW12);
static int lis2dw12_i2c_read_data(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len)
static int lis2dw12_i2c_read(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u16_t len)
{
return i2c_burst_read(data->bus, lis2dw12_i2c_slave_addr,
reg_addr, value, len);
}
static int lis2dw12_i2c_write_data(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len)
static int lis2dw12_i2c_write(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u16_t len)
{
return i2c_burst_write(data->bus, lis2dw12_i2c_slave_addr,
reg_addr, value, len);
}
static int lis2dw12_i2c_read_reg(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value)
{
return i2c_reg_read_byte(data->bus, lis2dw12_i2c_slave_addr,
reg_addr, value);
}
static int lis2dw12_i2c_write_reg(struct lis2dw12_data *data, u8_t reg_addr,
u8_t value)
{
return i2c_reg_write_byte(data->bus, lis2dw12_i2c_slave_addr,
reg_addr, value);
}
static int lis2dw12_i2c_update_reg(struct lis2dw12_data *data, u8_t reg_addr,
u8_t mask, u8_t value)
{
return i2c_reg_update_byte(data->bus, lis2dw12_i2c_slave_addr,
reg_addr, mask,
value << __builtin_ctz(mask));
}
static const struct lis2dw12_tf lis2dw12_i2c_transfer_fn = {
.read_data = lis2dw12_i2c_read_data,
.write_data = lis2dw12_i2c_write_data,
.read_reg = lis2dw12_i2c_read_reg,
.write_reg = lis2dw12_i2c_write_reg,
.update_reg = lis2dw12_i2c_update_reg,
lis2dw12_ctx_t lis2dw12_i2c_ctx = {
.read_reg = (lis2dw12_read_ptr) lis2dw12_i2c_read,
.write_reg = (lis2dw12_write_ptr) lis2dw12_i2c_write,
};
int lis2dw12_i2c_init(struct device *dev)
{
struct lis2dw12_data *data = dev->driver_data;
data->hw_tf = &lis2dw12_i2c_transfer_fn;
data->ctx = &lis2dw12_i2c_ctx;
data->ctx->handle = data;
return 0;
}

78
drivers/sensor/lis2dw12/lis2dw12_spi.c
View file

@ -28,11 +28,11 @@ static struct spi_config lis2dw12_spi_conf = {
.cs = NULL,
};
static int lis2dw12_raw_read(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len)
static int lis2dw12_spi_read(struct lis2dw12_data *ctx, u8_t reg,
u8_t *data, u16_t len)
{
struct spi_config *spi_cfg = &lis2dw12_spi_conf;
u8_t buffer_tx[2] = { reg_addr | LIS2DW12_SPI_READ, 0 };
u8_t buffer_tx[2] = { reg | LIS2DW12_SPI_READ, 0 };
const struct spi_buf tx_buf = {
.buf = buffer_tx,
.len = 2,
@ -47,7 +47,7 @@ static int lis2dw12_raw_read(struct lis2dw12_data *data, u8_t reg_addr,
.len = 1,
},
{
.buf = value,
.buf = data,
.len = len,
}
};
@ -56,30 +56,25 @@ static int lis2dw12_raw_read(struct lis2dw12_data *data, u8_t reg_addr,
.count = 2
};
if (len > 64) {
return -EIO;
}
if (spi_transceive(data->bus, spi_cfg, &tx, &rx)) {
if (spi_transceive(ctx->bus, spi_cfg, &tx, &rx)) {
return -EIO;
}
return 0;
}
static int lis2dw12_raw_write(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len)
static int lis2dw12_spi_write(struct lis2dw12_data *ctx, u8_t reg,
u8_t *data, u16_t len)
{
struct spi_config *spi_cfg = &lis2dw12_spi_conf;
u8_t buffer_tx[1] = { reg_addr & ~LIS2DW12_SPI_READ };
u8_t buffer_tx[1] = { reg & ~LIS2DW12_SPI_READ };
const struct spi_buf tx_buf[2] = {
{
.buf = buffer_tx,
.len = 1,
},
{
.buf = value,
.buf = data,
.len = len,
}
};
@ -89,67 +84,24 @@ static int lis2dw12_raw_write(struct lis2dw12_data *data, u8_t reg_addr,
};
if (len > 64) {
return -EIO;
}
if (spi_write(data->bus, spi_cfg, &tx)) {
if (spi_write(ctx->bus, spi_cfg, &tx)) {
return -EIO;
}
return 0;
}
static int lis2dw12_spi_read_data(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len)
{
return lis2dw12_raw_read(data, reg_addr, value, len);
}
static int lis2dw12_spi_write_data(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value, u8_t len)
{
return lis2dw12_raw_write(data, reg_addr, value, len);
}
static int lis2dw12_spi_read_reg(struct lis2dw12_data *data, u8_t reg_addr,
u8_t *value)
{
return lis2dw12_raw_read(data, reg_addr, value, 1);
}
static int lis2dw12_spi_write_reg(struct lis2dw12_data *data, u8_t reg_addr,
u8_t value)
{
u8_t tmp_val = value;
return lis2dw12_raw_write(data, reg_addr, &tmp_val, 1);
}
static int lis2dw12_spi_update_reg(struct lis2dw12_data *data, u8_t reg_addr,
u8_t mask, u8_t value)
{
u8_t tmp_val;
lis2dw12_raw_read(data, reg_addr, &tmp_val, 1);
tmp_val = (tmp_val & ~mask) | ((value << __builtin_ctz(mask)) & mask);
return lis2dw12_raw_write(data, reg_addr, &tmp_val, 1);
}
static const struct lis2dw12_tf lis2dw12_spi_transfer_fn = {
.read_data = lis2dw12_spi_read_data,
.write_data = lis2dw12_spi_write_data,
.read_reg = lis2dw12_spi_read_reg,
.write_reg = lis2dw12_spi_write_reg,
.update_reg = lis2dw12_spi_update_reg,
lis2dw12_ctx_t lis2dw12_spi_ctx = {
.read_reg = (lis2dw12_read_ptr) lis2dw12_spi_read,
.write_reg = (lis2dw12_write_ptr) lis2dw12_spi_write,
};
int lis2dw12_spi_init(struct device *dev)
{
struct lis2dw12_data *data = dev->driver_data;
data->hw_tf = &lis2dw12_spi_transfer_fn;
data->ctx = &lis2dw12_spi_ctx;
data->ctx->handle = data;
#if defined(DT_INST_0_ST_LIS2DW12_CS_GPIO_CONTROLLER)
/* handle SPI CS thru GPIO if it is the case */

35
drivers/sensor/lis2dw12/lis2dw12_trigger.c
View file

@ -25,18 +25,22 @@ static int lis2dw12_enable_int(struct device *dev, int enable)
{
const struct lis2dw12_device_config *cfg = dev->config->config_info;
struct lis2dw12_data *lis2dw12 = dev->driver_data;
lis2dw12_reg_t int_route;
/* set interrupt */
if (cfg->int_pin == 1U)
return lis2dw12->hw_tf->update_reg(lis2dw12,
LIS2DW12_CTRL4_ADDR,
LIS2DW12_INT1_DRDY,
enable);
if (cfg->int_pin == 1U) {
lis2dw12_pin_int1_route_get(lis2dw12->ctx,
&int_route.ctrl4_int1_pad_ctrl);
int_route.ctrl4_int1_pad_ctrl.int1_drdy = enable;
return lis2dw12_pin_int1_route_set(lis2dw12->ctx,
&int_route.ctrl4_int1_pad_ctrl);
}
return lis2dw12->hw_tf->update_reg(lis2dw12,
LIS2DW12_CTRL5_ADDR,
LIS2DW12_INT2_DRDY,
enable);
lis2dw12_pin_int2_route_get(lis2dw12->ctx,
&int_route.ctrl5_int2_pad_ctrl);
int_route.ctrl5_int2_pad_ctrl.int2_drdy = enable;
return lis2dw12_pin_int2_route_set(lis2dw12->ctx,
&int_route.ctrl5_int2_pad_ctrl);
}
/**
@ -47,18 +51,16 @@ int lis2dw12_trigger_set(struct device *dev,
sensor_trigger_handler_t handler)
{
struct lis2dw12_data *lis2dw12 = dev->driver_data;
u8_t raw[6];
axis3bit16_t raw;
if (trig->chan == SENSOR_CHAN_ACCEL_XYZ) {
lis2dw12->handler_drdy = handler;
if (handler) {
/* dummy read: re-trigger interrupt */
lis2dw12->hw_tf->read_data(lis2dw12,
LIS2DW12_OUT_X_L_ADDR, raw,
sizeof(raw));
return lis2dw12_enable_int(dev, LIS2DW12_EN_BIT);
lis2dw12_acceleration_raw_get(lis2dw12->ctx, raw.u8bit);
return lis2dw12_enable_int(dev, PROPERTY_ENABLE);
} else {
return lis2dw12_enable_int(dev, LIS2DW12_DIS_BIT);
return lis2dw12_enable_int(dev, PROPERTY_DISABLE);
}
}
@ -173,8 +175,7 @@ int lis2dw12_init_interrupt(struct device *dev)
}
/* enable interrupt on int1/int2 in pulse mode */
if (lis2dw12->hw_tf->update_reg(lis2dw12, LIS2DW12_CTRL3_ADDR,
LIS2DW12_LIR_MASK, LIS2DW12_DIS_BIT)) {
if (lis2dw12_int_notification_set(lis2dw12->ctx, LIS2DW12_INT_PULSED)) {
return -EIO;
}

1
tests/drivers/build_all/sensors_i_z.conf
View file

@ -9,7 +9,6 @@ CONFIG_SENSOR_LOG_LEVEL_DBG=y
CONFIG_ISL29035=y
CONFIG_LIS2DH=y
CONFIG_LIS2DS12=y
CONFIG_LIS2DW12=y
CONFIG_LIS2MDL=y
CONFIG_LIS3MDL=y
CONFIG_LPS22HB=y

8
tests/drivers/build_all/sensors_stmemsc.conf Normal file
View file

@ -0,0 +1,8 @@
CONFIG_TEST=y
CONFIG_TEST_USERSPACE=y
CONFIG_I2C=y
CONFIG_ADC=y
CONFIG_GPIO=y
CONFIG_SPI=y
CONFIG_SENSOR=y
CONFIG_LIS2DW12=y

9
tests/drivers/build_all/sensors_stmemsc_trigger.conf Normal file
View file

@ -0,0 +1,9 @@
CONFIG_TEST=y
CONFIG_TEST_USERSPACE=y
CONFIG_I2C=y
CONFIG_ADC=y
CONFIG_GPIO=y
CONFIG_SPI=y
CONFIG_SENSOR=y
CONFIG_LIS2DW12=y
CONFIG_LIS2DW12_TRIGGER_OWN_THREAD=y

2
tests/drivers/build_all/sensors_trigger_i_z.conf
View file

@ -11,8 +11,6 @@ CONFIG_LIS2DH=y
CONFIG_LIS2DH_TRIGGER_OWN_THREAD=y
CONFIG_LIS2DS12=y
CONFIG_LIS2DS12_TRIGGER_OWN_THREAD=y
CONFIG_LIS2DW12=y
CONFIG_LIS2DW12_TRIGGER_OWN_THREAD=y
CONFIG_LIS2MDL=y
CONFIG_LIS2MDL_TRIGGER_OWN_THREAD=y
CONFIG_LSM6DSL=y

14
tests/drivers/build_all/testcase.yaml
View file

@ -43,6 +43,20 @@ tests:
platform_exclude: frdm_kw41z
tags: drivers footprint
depends_on: adc spi
test_build_sensors_stmemsc:
build_only: true
extra_args: CONF_FILE=sensors_stmemsc.conf
min_ram: 32
platform_exclude: frdm_kw41z
tags: drivers footprint
depends_on: adc spi
test_build_sensors_stmemsc_trigger:
build_only: true
extra_args: CONF_FILE=sensors_stmemsc_trigger.conf
min_ram: 32
platform_exclude: frdm_kw41z
tags: drivers footprint
depends_on: adc spi
test_clock:
build_only: true
platform_whitelist: arduino_101