boards: frdm_mcxa153,frdm_mcxa156: add hwinfo support
1. enable hwinfo support - device_id_get - get_reset_cause - get_supported_reset_cause - clear_reset_cause 2. verified tests/drivers/hwinfo Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
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d4648a6767
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ab3d2dc830
4 changed files with 19 additions and 1 deletions
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@ -27,6 +27,12 @@ LOG_MODULE_REGISTER(hwinfo_cmc, CONFIG_HWINFO_LOG_LEVEL);
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#define CMC_RESET_MASK_WATCHDOG CMC_SRS_WWDT0_MASK
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#endif
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#ifdef CMC_SRS_CDOG1_MASK
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#define CMC_RESET_MASK_CDOG (CMC_SRS_CDOG0_MASK | CMC_SRS_CDOG1_MASK)
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#else
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#define CMC_RESET_MASK_CDOG CMC_SRS_CDOG0_MASK
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#endif
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/**
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* @brief Translate from CMC reset source mask to Zephyr hwinfo sources mask.
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*
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@ -77,7 +83,7 @@ static uint32_t hwinfo_mcux_cmc_xlate_reset_sources(uint32_t sources)
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mask |= RESET_CPU_LOCKUP;
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}
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if (sources & (CMC_SRS_CDOG0_MASK | CMC_SRS_CDOG1_MASK)) {
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if (sources & CMC_RESET_MASK_CDOG) {
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mask |= RESET_WATCHDOG;
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}
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@ -132,6 +132,11 @@
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erase-block-size = <8192>;
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write-block-size = <128>;
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};
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uuid: uuid@1100800 {
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compatible = "nxp,lpc-uid";
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reg = <0x1100800 0x10>;
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};
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};
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gpio0: gpio@40102000 {
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@ -163,6 +163,11 @@
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erase-block-size = <8192>;
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write-block-size = <128>;
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};
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uuid: uuid@1100800 {
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compatible = "nxp,lpc-uid";
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reg = <0x1100800 0x10>;
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};
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};
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ctimer0: ctimer@40004000 {
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@ -13,12 +13,14 @@ config SOC_SERIES_MCXA
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config SOC_MCXA153
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select CPU_CORTEX_M33
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select HAS_MCUX_CACHE
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select HAS_MCUX_MCX_CMC
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config SOC_MCXA156
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select CPU_CORTEX_M33
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select CPU_HAS_FPU
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select ARMV8_M_DSP
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select HAS_MCUX_CACHE
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select HAS_MCUX_MCX_CMC
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config SOC_MCXA166
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select CPU_CORTEX_M33
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