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pwm: nrf5_sw: do not use 'inversed' polarity by default

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The default PWM polarity was 'inversed', which is not aligned with the
other PWM drivers. Unfortunately there is not yet an API to define the
default polarity to be used by the driver, but assume that 'normal'
(signal starts high for the duration of the duty cycle) should be the
default.

Signed-off-by: Ricardo Salveti <ricardo@opensourcefoundries.com>
This commit is contained in:
Ricardo Salveti 2017-08-28 18:48:45 -03:00 • committed by Anas Nashif
commit ab399a1cf0
1 changed files with 6 additions and 6 deletions
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12
drivers/pwm/pwm_nrf5_sw.c
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@ -123,13 +123,13 @@ static int pwm_nrf5_sw_pin_set(struct device *dev, u32_t pwm,
/* configure GPIO pin as output */ /* configure GPIO pin as output */
NRF_GPIO->DIRSET = BIT(pwm); NRF_GPIO->DIRSET = BIT(pwm);
if (pulse_cycles == 0) { if (pulse_cycles == 0) {
/* 0% duty cycle, keep pin high (for active low LED) */ /* 0% duty cycle, keep pin low */
NRF_GPIO->OUTSET = BIT(pwm); NRF_GPIO->OUTCLR = BIT(pwm);
goto pin_set_pwm_off; goto pin_set_pwm_off;
} else if (pulse_cycles == period_cycles) { } else if (pulse_cycles == period_cycles) {
/* 100% duty cycle, keep pin low (for active low LED) */ /* 100% duty cycle, keep pin high */
NRF_GPIO->OUTCLR = BIT(pwm); NRF_GPIO->OUTSET = BIT(pwm);
goto pin_set_pwm_off; goto pin_set_pwm_off;
} else { } else {
@ -158,8 +158,8 @@ static int pwm_nrf5_sw_pin_set(struct device *dev, u32_t pwm,
timer->CC[config->map_size] = period_cycles >> div; timer->CC[config->map_size] = period_cycles >> div;
timer->TASKS_CLEAR = 1; timer->TASKS_CLEAR = 1;
/* configure GPIOTE, toggle with initialise output low */ /* configure GPIOTE, toggle with initialise output high */
NRF_GPIOTE->CONFIG[config->gpiote_base + channel] = 0x00030003 | NRF_GPIOTE->CONFIG[config->gpiote_base + channel] = 0x00130003 |
(pwm << 8); (pwm << 8);
/* setup PPI */ /* setup PPI */