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boards: arm: Conditionalize serial pinmuxes on nxp boards

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Conditionalizes serial pinmuxes on CONFIG_SERIAL for all nxp boards
(kinetis, lpc, and imx families) to avoid possible conflicts between
peripherals.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2020-05-21 08:32:04 -05:00 • committed by Carles Cufí
commit ab2d73379a
28 changed files with 42 additions and 40 deletions
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2
boards/arm/96b_meerkat96/pinmux.c
View file

@ -26,7 +26,7 @@ static int meerakt96_pinmux_init(struct device *dev)
IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO07 = 0; IOMUXC_LPSR_SW_PAD_CTL_PAD_GPIO1_IO07 = 0;
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) && CONFIG_SERIAL
IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_MUX_MODE(0); IOMUXC_SW_MUX_CTL_PAD_UART1_RX_DATA_MUX_MODE(0);
IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART1_TX_DATA =

2
boards/arm/colibri_imx7d_m4/pinmux.c
View file

@ -26,7 +26,7 @@ static int colibri_imx7d_m4_pinmux_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_EPDC_GDRL_HYS_MASK; IOMUXC_SW_PAD_CTL_PAD_EPDC_GDRL_HYS_MASK;
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) && CONFIG_SERIAL
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0); IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0);
IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA =

2
boards/arm/frdm_k22f/Kconfig.defconfig
View file

@ -35,7 +35,7 @@ config PINMUX_MCUX_PORTD
default y default y
config PINMUX_MCUX_PORTE config PINMUX_MCUX_PORTE
default y if "$(dt_nodelabel_enabled,uart1)" default y if "$(dt_nodelabel_enabled,uart1)" && SERIAL
endif # PINMUX_MCUX endif # PINMUX_MCUX

6
boards/arm/frdm_k22f/pinmux.c
View file

@ -33,17 +33,17 @@ static int frdm_k22f_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL
#error "No UART0 is used" #error "No UART0 is used"
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart1), okay) && CONFIG_SERIAL
/* UART1 RX, TX */ /* UART1 RX, TX */
pinmux_pin_set(porte, 0, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 0, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 1, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) && CONFIG_SERIAL
/* UART2 RX, TX */ /* UART2 RX, TX */
pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 2, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3));

3
boards/arm/frdm_k64f/Kconfig.defconfig
View file

@ -32,7 +32,8 @@ config PINMUX_MCUX_PORTC
default y default y
config PINMUX_MCUX_PORTD config PINMUX_MCUX_PORTD
default y if "$(dt_nodelabel_enabled,spi0)" || "$(dt_nodelabel_enabled,uart2)" default y if "$(dt_nodelabel_enabled,spi0)"
default y if "$(dt_nodelabel_enabled,uart2)" && SERIAL
config PINMUX_MCUX_PORTE config PINMUX_MCUX_PORTE
default y default y

6
boards/arm/frdm_k64f/pinmux.c
View file

@ -33,13 +33,13 @@ static int frdm_k64f_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) && CONFIG_SERIAL
/* UART2 RX, TX */ /* UART2 RX, TX */
pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 0, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 1, PORT_PCR_MUX(kPORT_MuxAlt3));
@ -47,7 +47,7 @@ static int frdm_k64f_pinmux_init(struct device *dev)
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart3), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart3), okay) && CONFIG_SERIAL
/* UART3 RX, TX */ /* UART3 RX, TX */
pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 17, PORT_PCR_MUX(kPORT_MuxAlt3));

2
boards/arm/frdm_k82f/pinmux.c
View file

@ -71,7 +71,7 @@ static int frdm_k82f_pinmux_init(struct device *dev)
pinmux_pin_set(porte, 3, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(porte, 3, PORT_PCR_MUX(kPORT_MuxAsGpio));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart4), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart4), okay) && CONFIG_SERIAL
/* LPUART4 RX, TX */ /* LPUART4 RX, TX */
pinmux_pin_set(portc, 14, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 14, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portc, 15, PORT_PCR_MUX(kPORT_MuxAlt3));

2
boards/arm/frdm_kl25z/pinmux.c
View file

@ -33,7 +33,7 @@ static int frdm_kl25z_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt2));

2
boards/arm/frdm_kw41z/pinmux.c
View file

@ -55,7 +55,7 @@ static int frdm_kw41z_pinmux_init(struct device *dev)
pinmux_pin_set(portc, 4, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portc, 4, PORT_PCR_MUX(kPORT_MuxAsGpio));
pinmux_pin_set(portc, 5, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portc, 5, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4));
pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4));

4
boards/arm/hexiwear_k64/Kconfig.defconfig
View file

@ -26,7 +26,7 @@ config PINMUX_MCUX_PORTA
default y if MAX30101 default y if MAX30101
config PINMUX_MCUX_PORTB config PINMUX_MCUX_PORTB
default y if "$(dt_nodelabel_enabled,uart0)" default y if "$(dt_nodelabel_enabled,uart0)" && SERIAL
config PINMUX_MCUX_PORTC config PINMUX_MCUX_PORTC
default y default y
@ -35,7 +35,7 @@ config PINMUX_MCUX_PORTD
default y default y
config PINMUX_MCUX_PORTE config PINMUX_MCUX_PORTE
default y if "$(dt_nodelabel_enabled,uart4)" default y if "$(dt_nodelabel_enabled,uart4)" && SERIAL
endif # PINMUX_MCUX endif # PINMUX_MCUX

4
boards/arm/hexiwear_k64/pinmux.c
View file

@ -71,13 +71,13 @@ static int hexiwear_k64_pinmux_init(struct device *dev)
/* FXOS8700 INT2 */ /* FXOS8700 INT2 */
pinmux_pin_set(portd, 13, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 13, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart4), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart4), okay) && CONFIG_SERIAL
/* UART4 RX, TX - BLE */ /* UART4 RX, TX - BLE */
pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 24, PORT_PCR_MUX(kPORT_MuxAlt3));
pinmux_pin_set(porte, 25, PORT_PCR_MUX(kPORT_MuxAlt3)); pinmux_pin_set(porte, 25, PORT_PCR_MUX(kPORT_MuxAlt3));

3
boards/arm/hexiwear_kw40z/Kconfig.defconfig
View file

@ -26,7 +26,8 @@ config PINMUX_MCUX_PORTB
default y if "$(dt_nodelabel_enabled,adc0)" default y if "$(dt_nodelabel_enabled,adc0)"
config PINMUX_MCUX_PORTC config PINMUX_MCUX_PORTC
default y if "$(dt_nodelabel_enabled,lpuart0)" || "$(dt_nodelabel_enabled,i2c1)" default y if "$(dt_nodelabel_enabled,lpuart0)" && SERIAL
default y if "$(dt_nodelabel_enabled,i2c1)"
endif # PINMUX_MCUX endif # PINMUX_MCUX

2
boards/arm/hexiwear_kw40z/pinmux.c
View file

@ -22,7 +22,7 @@ static int hexiwear_kw40z_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTC_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTC_NAME);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 6, PORT_PCR_MUX(kPORT_MuxAlt4));
pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4)); pinmux_pin_set(portc, 7, PORT_PCR_MUX(kPORT_MuxAlt4));

2
boards/arm/lpcxpresso54114/pinmux.c
View file

@ -23,7 +23,7 @@ static int lpcxpresso_54114_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME); device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME);
#endif #endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL
/* USART0 RX, TX */ /* USART0 RX, TX */
const u32_t port0_pin0_config = ( const u32_t port0_pin0_config = (
IOCON_PIO_FUNC1 | IOCON_PIO_FUNC1 |

2
boards/arm/lpcxpresso55s16/pinmux.c
View file

@ -95,7 +95,7 @@ static int lpcxpresso_55s16_pinmux_init(struct device *dev)
pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(led2), gpios), led2_config); pinmux_pin_set(port1, DT_GPIO_PIN(DT_ALIAS(led2), gpios), led2_config);
#endif #endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL
/* USART0 RX, TX */ /* USART0 RX, TX */
const u32_t port0_pin29_config = ( const u32_t port0_pin29_config = (
IOCON_PIO_FUNC1 | IOCON_PIO_FUNC1 |

2
boards/arm/lpcxpresso55s69/pinmux.c
View file

@ -23,7 +23,7 @@ static int lpcxpresso_55s69_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME); device_get_binding(CONFIG_PINMUX_MCUX_LPC_PORT1_NAME);
#endif #endif
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) #if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(flexcomm0), nxp_lpc_usart, okay) && CONFIG_SERIAL
/* USART0 RX, TX */ /* USART0 RX, TX */
const u32_t port0_pin29_config = ( const u32_t port0_pin29_config = (
IOCON_PIO_FUNC1 | IOCON_PIO_FUNC1 |

2
boards/arm/mimxrt1010_evk/pinmux.c
View file

@ -36,7 +36,7 @@ static int mimxrt1010_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(4)); IOMUXC_SW_PAD_CTL_PAD_DSE(4));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_09_LPUART1_RXD, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_09_LPUART1_RXD, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_10_LPUART1_TXD, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_10_LPUART1_TXD, 0);

4
boards/arm/mimxrt1020_evk/pinmux.c
View file

@ -34,7 +34,7 @@ static int mimxrt1020_evk_init(struct device *dev)
/* SW0 */ /* SW0 */
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_06_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_07_LPUART1_RX, 0);
@ -50,7 +50,7 @@ static int mimxrt1020_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart2), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart2), okay) && CONFIG_SERIAL
/* LPUART2 TX/RX */ /* LPUART2 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_LPUART2_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_08_LPUART2_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_LPUART2_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_LPUART2_RX, 0);

4
boards/arm/mimxrt1050_evk/pinmux.c
View file

@ -131,7 +131,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
@ -147,7 +147,7 @@ static int mimxrt1050_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) && CONFIG_SERIAL
/* LPUART3 TX/RX */ /* LPUART3 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0);

4
boards/arm/mimxrt1060_evk/pinmux.c
View file

@ -114,7 +114,7 @@ static int mimxrt1060_evk_init(struct device *dev)
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
@ -130,7 +130,7 @@ static int mimxrt1060_evk_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_DSE(6)); IOMUXC_SW_PAD_CTL_PAD_DSE(6));
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) && CONFIG_SERIAL
/* LPUART3 TX/RX */ /* LPUART3 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_LPUART3_RX, 0);

2
boards/arm/mimxrt1064_evk/pinmux.c
View file

@ -114,7 +114,7 @@ static int mimxrt1064_evk_init(struct device *dev)
IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0); IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
/* LPUART1 TX/RX */ /* LPUART1 TX/RX */
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0); IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);

6
boards/arm/pico_pi_m4/pinmux.c
View file

@ -12,7 +12,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
{ {
ARG_UNUSED(dev); ARG_UNUSED(dev);
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) && CONFIG_SERIAL
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0); IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0);
IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA =
@ -34,7 +34,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart5), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart5), okay) && CONFIG_SERIAL
IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL = IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL =
IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_MUX_MODE(1); IOMUXC_SW_MUX_CTL_PAD_I2C4_SCL_MUX_MODE(1);
IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA = IOMUXC_SW_MUX_CTL_PAD_I2C4_SDA =
@ -58,7 +58,7 @@ static int pico_pi_m4_pinmux_init(struct device *dev)
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart6), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart6), okay) && CONFIG_SERIAL
IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08 = IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08 =
IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08_MUX_MODE(3); IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA08_MUX_MODE(3);
IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA09 = IOMUXC_SW_MUX_CTL_PAD_EPDC_DATA09 =

2
boards/arm/twr_ke18f/pinmux.c
View file

@ -64,7 +64,7 @@ static int twr_ke18f_pinmux_init(struct device *dev)
pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 3, PORT_PCR_MUX(kPORT_MuxAsGpio));
pinmux_pin_set(portd, 6, PORT_PCR_MUX(kPORT_MuxAsGpio)); pinmux_pin_set(portd, 6, PORT_PCR_MUX(kPORT_MuxAsGpio));
#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_MuxAlt2));

2
boards/arm/twr_kv58f220m/pinmux.c
View file

@ -57,7 +57,7 @@ static int twr_kv58f220m_pinmux_init(struct device *dev)
| PORT_PCR_ODE_MASK); | PORT_PCR_ODE_MASK);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt7)); pinmux_pin_set(portb, 0, PORT_PCR_MUX(kPORT_MuxAlt7));
pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_MuxAlt7)); pinmux_pin_set(portb, 1, PORT_PCR_MUX(kPORT_MuxAlt7));

2
boards/arm/udoo_neo_full_m4/pinmux.c
View file

@ -22,7 +22,7 @@ static int udoo_neo_full_m4_init(struct device *dev)
IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_DSE(6); IOMUXC_SW_PAD_CTL_PAD_NAND_DATA02_DSE(6);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart5), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart5), okay) && CONFIG_SERIAL
/* UART5 pin mux configuration */ /* UART5 pin mux configuration */
IOMUXC_SW_MUX_CTL_PAD_SD4_DATA4 = IOMUXC_SW_MUX_CTL_PAD_SD4_DATA4 =
IOMUXC_SW_MUX_CTL_PAD_SD4_DATA4_MUX_MODE(2); IOMUXC_SW_MUX_CTL_PAD_SD4_DATA4_MUX_MODE(2);

2
boards/arm/usb_kw24d512/Kconfig.defconfig
View file

@ -27,7 +27,7 @@ config MCG_FCRDIV
if PINMUX_MCUX if PINMUX_MCUX
config PINMUX_MCUX_PORTA config PINMUX_MCUX_PORTA
default y if "$(dt_nodelabel_enabled,uart0)" default y if "$(dt_nodelabel_enabled,uart0)" && SERIAL
config PINMUX_MCUX_PORTB config PINMUX_MCUX_PORTB
default y if SPI_1 default y if SPI_1

2
boards/arm/usb_kw24d512/pinmux.c
View file

@ -29,7 +29,7 @@ static int usb_kw24d512_pinmux_init(struct device *dev)
device_get_binding(CONFIG_PINMUX_MCUX_PORTD_NAME); device_get_binding(CONFIG_PINMUX_MCUX_PORTD_NAME);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart0), okay) && CONFIG_SERIAL
/* UART0 RX, TX */ /* UART0 RX, TX */
pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porta, 1, PORT_PCR_MUX(kPORT_MuxAlt2));
pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt2)); pinmux_pin_set(porta, 2, PORT_PCR_MUX(kPORT_MuxAlt2));

4
boards/arm/warp7_m4/pinmux.c
View file

@ -25,7 +25,7 @@ static int warp7_m4_pinmux_init(struct device *dev)
IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_RD1_MUX_MODE(5); IOMUXC_SW_MUX_CTL_PAD_ENET1_RGMII_RD1_MUX_MODE(5);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart2), okay) && CONFIG_SERIAL
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA =
IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0); IOMUXC_SW_MUX_CTL_PAD_UART2_RX_DATA_MUX_MODE(0);
IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA = IOMUXC_SW_MUX_CTL_PAD_UART2_TX_DATA =
@ -47,7 +47,7 @@ static int warp7_m4_pinmux_init(struct device *dev)
IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(2); IOMUXC_UART2_RX_DATA_SELECT_INPUT_DAISY(2);
#endif #endif
#if DT_NODE_HAS_STATUS(DT_NODELABEL(uart6), okay) #if DT_NODE_HAS_STATUS(DT_NODELABEL(uart6), okay) && CONFIG_SERIAL
IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK = IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK =
IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_MUX_MODE(1); IOMUXC_SW_MUX_CTL_PAD_ECSPI1_SCLK_MUX_MODE(1);
IOMUXC_SW_MUX_CTL_PAD_ECSPI1_MOSI = IOMUXC_SW_MUX_CTL_PAD_ECSPI1_MOSI =