soc: atmel_sam: Add _INST to ATMEL_SAM_DT_PIN* macros
The macros are used to get the pin(s) of a given driver instance. Add _INST prefix to match convention used by the devicetree.h. The original macros can now be used to obtain pin(s) of an arbitrary device instance identified by the nodelabel. Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
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da906cca24
commit
aaf64e0bdf
11 changed files with 68 additions and 57 deletions
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@ -356,7 +356,7 @@ static void adc_sam_isr(const struct device *dev)
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.regs = (Afec *)DT_INST_REG_ADDR(n), \
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.cfg_func = adc##n##_sam_cfg_func, \
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.periph_id = DT_INST_PROP(n, peripheral_id), \
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.afec_trg_pin = ATMEL_SAM_DT_PIN(n, 0), \
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.afec_trg_pin = ATMEL_SAM_DT_INST_PIN(n, 0), \
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}; \
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\
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static struct adc_sam_data adc##n##_sam_data = { \
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@ -2214,7 +2214,7 @@ static void eth0_irq_config(void)
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}
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#ifdef CONFIG_SOC_FAMILY_SAM
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static const struct soc_gpio_pin pins_eth0[] = ATMEL_SAM_DT_PINS(0);
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static const struct soc_gpio_pin pins_eth0[] = ATMEL_SAM_DT_INST_PINS(0);
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#endif
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static const struct eth_sam_dev_cfg eth0_config = {
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@ -614,8 +614,7 @@ static const struct i2c_driver_api i2c_sam_twim_driver_api = {
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DEVICE_DT_INST_GET(n), 0); \
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} \
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\
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static const struct soc_gpio_pin pins_twim##n[] = \
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{ATMEL_SAM_DT_PIN(n, 0), ATMEL_SAM_DT_PIN(n, 1)}; \
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static const struct soc_gpio_pin pins_twim##n[] = ATMEL_SAM_DT_INST_PINS(n); \
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\
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static const struct i2c_sam_twim_dev_cfg i2c##n##_sam_config = {\
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.regs = (Twim *)DT_INST_REG_ADDR(n), \
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@ -346,8 +346,7 @@ static const struct i2c_driver_api i2c_sam_twi_driver_api = {
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DEVICE_DT_INST_GET(n), 0); \
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} \
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\
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static const struct soc_gpio_pin pins_twi##n[] = \
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{ATMEL_SAM_DT_PIN(n, 0), ATMEL_SAM_DT_PIN(n, 1)}; \
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static const struct soc_gpio_pin pins_twi##n[] = ATMEL_SAM_DT_INST_PINS(n); \
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\
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static const struct i2c_sam_twi_dev_cfg i2c##n##_sam_config = { \
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.regs = (Twi *)DT_INST_REG_ADDR(n), \
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@ -333,8 +333,7 @@ static const struct i2c_driver_api i2c_sam_twihs_driver_api = {
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DEVICE_DT_INST_GET(n), 0); \
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} \
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\
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static const struct soc_gpio_pin pins_twihs##n[] = \
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{ATMEL_SAM_DT_PIN(n, 0), ATMEL_SAM_DT_PIN(n, 1)}; \
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static const struct soc_gpio_pin pins_twihs##n[] = ATMEL_SAM_DT_INST_PINS(n); \
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\
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static const struct i2c_sam_twihs_dev_cfg i2c##n##_sam_config = {\
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.regs = (Twihs *)DT_INST_REG_ADDR(n), \
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@ -976,7 +976,7 @@ static void i2s0_sam_irq_config(void)
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DEVICE_DT_INST_GET(0), 0);
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}
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static const struct soc_gpio_pin i2s0_pins[] = ATMEL_SAM_DT_PINS(0);
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static const struct soc_gpio_pin i2s0_pins[] = ATMEL_SAM_DT_INST_PINS(0);
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static const struct i2s_sam_dev_cfg i2s0_sam_config = {
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.dev_dma = DEVICE_DT_GET(DT_INST_DMAS_CTLR_BY_NAME(0, tx)),
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@ -123,7 +123,7 @@ static const struct sensor_driver_api qdec_sam_driver_api = {
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};
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#define QDEC_SAM_INIT(n) \
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static const struct soc_gpio_pin pins_tc##n[] = ATMEL_SAM_DT_PINS(n); \
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static const struct soc_gpio_pin pins_tc##n[] = ATMEL_SAM_DT_INST_PINS(n); \
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\
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static const struct qdec_sam_dev_cfg qdec##n##_sam_config = { \
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.regs = (Tc *)DT_INST_REG_ADDR(n), \
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@ -327,8 +327,8 @@ static const struct uart_driver_api uart_sam_driver_api = {
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.regs = (Uart *)DT_INST_REG_ADDR(n), \
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.periph_id = DT_INST_PROP(n, peripheral_id), \
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\
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.pin_rx = ATMEL_SAM_DT_PIN(n, 0), \
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.pin_tx = ATMEL_SAM_DT_PIN(n, 1), \
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.pin_rx = ATMEL_SAM_DT_INST_PIN(n, 0), \
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.pin_tx = ATMEL_SAM_DT_INST_PIN(n, 1), \
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\
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IRQ_FUNC_INIT \
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}
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@ -328,8 +328,8 @@ static const struct uart_driver_api usart_sam_driver_api = {
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.regs = (Usart *)DT_INST_REG_ADDR(n), \
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.periph_id = DT_INST_PROP(n, peripheral_id), \
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\
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.pin_rx = ATMEL_SAM_DT_PIN(n, 0), \
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.pin_tx = ATMEL_SAM_DT_PIN(n, 1), \
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.pin_rx = ATMEL_SAM_DT_INST_PIN(n, 0), \
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.pin_tx = ATMEL_SAM_DT_INST_PIN(n, 1), \
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\
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IRQ_FUNC_INIT \
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}
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@ -457,8 +457,8 @@ static const struct spi_driver_api spi_sam_driver_api = {
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static const struct spi_sam_config spi_sam_config_##n = { \
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.regs = (Spi *)DT_INST_REG_ADDR(n), \
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.periph_id = DT_INST_PROP(n, peripheral_id), \
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.num_pins = ATMEL_SAM_DT_NUM_PINS(n), \
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.pins = ATMEL_SAM_DT_PINS(n), \
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.num_pins = ATMEL_SAM_DT_INST_NUM_PINS(n), \
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.pins = ATMEL_SAM_DT_INST_PINS(n), \
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}
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#define SPI_SAM_DEVICE_INIT(n) \
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@ -16,74 +16,88 @@
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/* Devicetree related macros to construct pin mux config data */
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/* Get a node id from a pinctrl-0 prop at index 'i' */
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#define NODE_ID_FROM_PINCTRL_0(inst, i) \
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DT_INST_PHANDLE_BY_IDX(inst, pinctrl_0, i)
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#define NODE_ID_FROM_PINCTRL_0(node_id, i) \
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DT_PHANDLE_BY_IDX(node_id, pinctrl_0, i)
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/* Get PIN associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN(inst, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(inst, i), atmel_pins, pin)
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#define ATMEL_SAM_PIN(node_id, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins, pin)
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/* Get PIO register address associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN_TO_PIO_REG_ADDR(inst, i) \
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DT_REG_ADDR(DT_PHANDLE(NODE_ID_FROM_PINCTRL_0(inst, i), atmel_pins))
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#define ATMEL_SAM_PIN_TO_PIO_REG_ADDR(node_id, i) \
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DT_REG_ADDR(DT_PHANDLE(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins))
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/* Get peripheral id for PIO associated with pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN_2_PIO_PERIPH_ID(inst, i) \
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DT_PROP_BY_PHANDLE(NODE_ID_FROM_PINCTRL_0(inst, i),\
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#define ATMEL_SAM_PIN_2_PIO_PERIPH_ID(node_id, i) \
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DT_PROP_BY_PHANDLE(NODE_ID_FROM_PINCTRL_0(node_id, i),\
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atmel_pins, peripheral_id)
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/* Get peripheral cfg associated wiith pinctrl-0 pin at index 'i' */
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#define ATMEL_SAM_PIN_PERIPH(inst, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(inst, i), atmel_pins, peripheral)
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#define ATMEL_SAM_PIN_PERIPH(node_id, i) \
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DT_PHA(NODE_ID_FROM_PINCTRL_0(node_id, i), atmel_pins, peripheral)
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/* Helper function for ATMEL_SAM_PIN_FLAGS */
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#define ATMEL_SAM_PIN_FLAG(inst, i, flag) \
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DT_PROP(NODE_ID_FROM_PINCTRL_0(inst, i), flag)
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#define ATMEL_SAM_PIN_FLAG(node_id, i, flag) \
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DT_PROP(NODE_ID_FROM_PINCTRL_0(node_id, i), flag)
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/* Convert DT flags to SoC flags */
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#define ATMEL_SAM_PIN_FLAGS(inst, i) \
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(ATMEL_SAM_PIN_FLAG(inst, i, bias_pull_up) << SOC_GPIO_PULLUP_POS | \
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ATMEL_SAM_PIN_FLAG(inst, i, bias_pull_down) << SOC_GPIO_PULLUP_POS | \
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ATMEL_SAM_PIN_FLAG(inst, i, drive_open_drain) << SOC_GPIO_OPENDRAIN_POS)
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/* Construct a soc_pio_pin element for pin cfg */
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#define ATMEL_SAM_DT_PIO(inst, idx) \
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{ \
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1 << ATMEL_SAM_PIN(inst, idx), \
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(Pio *)ATMEL_SAM_PIN_TO_PIO_REG_ADDR(inst, idx), \
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ATMEL_SAM_PIN_2_PIO_PERIPH_ID(inst, idx), \
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ATMEL_SAM_PIN_PERIPH(inst, idx) << SOC_GPIO_FUNC_POS | \
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ATMEL_SAM_PIN_FLAGS(inst, idx) \
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}
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/* Construct a soc_gpio_pin element for pin cfg */
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#define ATMEL_SAM_DT_GPIO(inst, idx) \
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{ \
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1 << ATMEL_SAM_PIN(inst, idx), \
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(Gpio *)ATMEL_SAM_PIN_TO_PIO_REG_ADDR(inst, idx), \
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ATMEL_SAM_PIN_2_PIO_PERIPH_ID(inst, idx), \
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ATMEL_SAM_PIN_PERIPH(inst, idx) << SOC_GPIO_FUNC_POS | \
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ATMEL_SAM_PIN_FLAGS(inst, idx) \
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}
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#define ATMEL_SAM_PIN_FLAGS(node_id, i) \
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(ATMEL_SAM_PIN_FLAG(node_id, i, bias_pull_up) << SOC_GPIO_PULLUP_POS | \
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ATMEL_SAM_PIN_FLAG(node_id, i, bias_pull_down) << SOC_GPIO_PULLUP_POS | \
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ATMEL_SAM_PIN_FLAG(node_id, i, drive_open_drain) << SOC_GPIO_OPENDRAIN_POS)
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#if defined(CONFIG_SOC_SERIES_SAM4L)
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/* Construct a soc_gpio_pin element for pin cfg */
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#define ATMEL_SAM_DT_GPIO(node_id, idx) \
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{ \
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1 << ATMEL_SAM_PIN(node_id, idx), \
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(Gpio *)ATMEL_SAM_PIN_TO_PIO_REG_ADDR(node_id, idx), \
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ATMEL_SAM_PIN_2_PIO_PERIPH_ID(node_id, idx), \
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ATMEL_SAM_PIN_PERIPH(node_id, idx) << SOC_GPIO_FUNC_POS | \
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ATMEL_SAM_PIN_FLAGS(node_id, idx) \
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}
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#define ATMEL_SAM_DT_INST_GPIO(inst, idx) \
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ATMEL_SAM_DT_GPIO(DT_DRV_INST(inst), idx)
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#define ATMEL_SAM_DT_PIN ATMEL_SAM_DT_GPIO
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#define ATMEL_SAM_DT_INST_PIN ATMEL_SAM_DT_INST_GPIO
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#else
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/* Construct a soc_pio_pin element for pin cfg */
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#define ATMEL_SAM_DT_PIO(node_id, idx) \
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{ \
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1 << ATMEL_SAM_PIN(node_id, idx), \
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(Pio *)ATMEL_SAM_PIN_TO_PIO_REG_ADDR(node_id, idx), \
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ATMEL_SAM_PIN_2_PIO_PERIPH_ID(node_id, idx), \
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ATMEL_SAM_PIN_PERIPH(node_id, idx) << SOC_GPIO_FUNC_POS | \
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ATMEL_SAM_PIN_FLAGS(node_id, idx) \
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}
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#define ATMEL_SAM_DT_INST_PIO(inst, idx) \
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ATMEL_SAM_DT_PIO(DT_DRV_INST(inst), idx)
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#define ATMEL_SAM_DT_PIN ATMEL_SAM_DT_PIO
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#define ATMEL_SAM_DT_INST_PIN ATMEL_SAM_DT_INST_PIO
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#endif
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/* Get the number of pins for pinctrl-0 */
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#define ATMEL_SAM_DT_NUM_PINS(inst) DT_INST_PROP_LEN(inst, pinctrl_0)
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#define ATMEL_SAM_DT_NUM_PINS(node_id) DT_PROP_LEN(node_id, pinctrl_0)
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#define ATMEL_SAM_DT_INST_NUM_PINS(inst) \
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ATMEL_SAM_DT_NUM_PINS(DT_DRV_INST(inst))
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/* internal macro to structure things for use with UTIL_LISTIFY */
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#define ATMEL_SAM_DT_PIN_ELEM(idx, inst) ATMEL_SAM_DT_PIN(inst, idx),
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#define ATMEL_SAM_DT_PIN_ELEM(idx, node_id) ATMEL_SAM_DT_PIN(node_id, idx),
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/* Construct an array intializer for soc_gpio_pin for a device instance */
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#define ATMEL_SAM_DT_PINS(inst) \
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{ UTIL_LISTIFY(ATMEL_SAM_DT_NUM_PINS(inst), \
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ATMEL_SAM_DT_PIN_ELEM, inst) \
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#define ATMEL_SAM_DT_PINS(node_id) \
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{ UTIL_LISTIFY(ATMEL_SAM_DT_NUM_PINS(node_id), \
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ATMEL_SAM_DT_PIN_ELEM, node_id) \
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}
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#define ATMEL_SAM_DT_INST_PINS(inst) \
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ATMEL_SAM_DT_PINS(DT_DRV_INST(inst))
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/* Devicetree macros related to clock */
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#define ATMEL_SAM_DT_CPU_CLK_FREQ_HZ \
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