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include/dt-bindings/pinctrl: stm32: Remove c pinmux api leftover

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Following definitive transition to dts pinmux then pinctrl api
remove C pinmux api leftover definitions.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-11-23 14:38:24 +01:00 • committed by Anas Nashif
commit aad0f000c6
2 changed files with 0 additions and 94 deletions
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43
include/dt-bindings/pinctrl/stm32-pinctrl.h
View file

@ -78,26 +78,6 @@
* Applicable to STM32F3, STM32F4, STM32L4 series
*/
/* Alternate functions */
#define STM32_FUNC_ALT_0 0
#define STM32_FUNC_ALT_1 1
#define STM32_FUNC_ALT_2 2
#define STM32_FUNC_ALT_3 3
#define STM32_FUNC_ALT_4 4
#define STM32_FUNC_ALT_5 5
#define STM32_FUNC_ALT_6 6
#define STM32_FUNC_ALT_7 7
#define STM32_FUNC_ALT_8 8
#define STM32_FUNC_ALT_9 9
#define STM32_FUNC_ALT_10 10
#define STM32_FUNC_ALT_11 11
#define STM32_FUNC_ALT_12 12
#define STM32_FUNC_ALT_13 13
#define STM32_FUNC_ALT_14 14
#define STM32_FUNC_ALT_15 15
#define STM32_AFR_MASK 0xF
#define STM32_AFR_SHIFT 0
/* GPIO Mode */
#define STM32_MODER_INPUT_MODE (0x0<<STM32_MODER_SHIFT)
#define STM32_MODER_OUTPUT_MODE (0x1<<STM32_MODER_SHIFT)
@ -127,27 +107,4 @@
#define STM32_PUPDR_MASK 0x3
#define STM32_PUPDR_SHIFT 9
/* Alternate functions definitions */
#define STM32_PINMUX_ALT_FUNC_0 (STM32_FUNC_ALT_0 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_1 (STM32_FUNC_ALT_1 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_2 (STM32_FUNC_ALT_2 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_3 (STM32_FUNC_ALT_3 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_4 (STM32_FUNC_ALT_4 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_5 (STM32_FUNC_ALT_5 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_6 (STM32_FUNC_ALT_6 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_7 (STM32_FUNC_ALT_7 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_8 (STM32_FUNC_ALT_8 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_9 (STM32_FUNC_ALT_9 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_10 (STM32_FUNC_ALT_10 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_11 (STM32_FUNC_ALT_11 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_12 (STM32_FUNC_ALT_12 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_13 (STM32_FUNC_ALT_13 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_14 (STM32_FUNC_ALT_14 | STM32_MODER_ALT_MODE)
#define STM32_PINMUX_ALT_FUNC_15 (STM32_FUNC_ALT_15 | STM32_MODER_ALT_MODE)
/* Useful definitions */
#define STM32_PUSHPULL_NOPULL (STM32_OTYPER_PUSH_PULL | STM32_PUPDR_NO_PULL)
#define STM32_OPENDRAIN_PULLUP (STM32_OTYPER_OPEN_DRAIN | STM32_PUPDR_PULL_UP)
#define STM32_PUSHPULL_PULLUP (STM32_OTYPER_PUSH_PULL | STM32_PUPDR_PULL_UP)
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_STM32_PINCTRL_H_ */

51
include/dt-bindings/pinctrl/stm32f1-pinctrl.h
View file

@ -71,12 +71,6 @@
* Applicable to STM32F1 series
*/
/* Alternate functions */
/* STM32F1 Pinmux doesn't use explicit alternate functions */
/* These are kept for compatibility with other STM32 pinmux */
#define STM32_AFR_MASK 0
#define STM32_AFR_SHIFT 0
/* Port Mode */
#define STM32_MODE_INPUT (0x0<<STM32_MODE_INOUT_SHIFT)
#define STM32_MODE_OUTPUT (0x1<<STM32_MODE_INOUT_SHIFT)
@ -114,49 +108,4 @@
#define STM32_PUPD_MASK 0x3
#define STM32_PUPD_SHIFT 7
/* Alternate defines */
/* IO pin functions are mostly common across STM32 devices. Notable
* exception is STM32F1 as these MCUs do not have registers for
* configuration of pin's alternate function. The configuration is
* done implicitly by setting specific mode and config in MODE and CNF
* registers for particular pin.
*/
#define STM32_ALTERNATE (STM32_MODE_OUTPUT | STM32_CNF_ALT_FUNC)
#define STM32_PIN_USART_TX (STM32_ALTERNATE | STM32_CNF_PUSH_PULL)
#define STM32_PIN_USART_RX (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT)
#define STM32_PIN_I2C (STM32_ALTERNATE | STM32_CNF_OPEN_DRAIN)
#define STM32_PIN_PWM (STM32_ALTERNATE | STM32_CNF_PUSH_PULL)
#define STM32_PIN_SPI_MASTER_SCK (STM32_ALTERNATE | STM32_CNF_PUSH_PULL)
#define STM32_PIN_SPI_SLAVE_SCK (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT)
#define STM32_PIN_SPI_MASTER_MOSI (STM32_ALTERNATE | STM32_CNF_PUSH_PULL)
#define STM32_PIN_SPI_SLAVE_MOSI (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT)
#define STM32_PIN_SPI_MASTER_MISO (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT)
#define STM32_PIN_SPI_SLAVE_MISO (STM32_ALTERNATE | STM32_CNF_PUSH_PULL)
#define STM32_PIN_CAN_TX (STM32_ALTERNATE | STM32_CNF_PUSH_PULL)
#define STM32_PIN_CAN_RX (STM32_MODE_INPUT | STM32_PUPD_PULL_UP)
/*
* Reference manual (RM0008)
* Section 25.3.1: Slave select (NSS) pin management
*
* Hardware NSS management:
* - NSS output disabled: allows multimaster capability for devices operating
* in master mode.
* - NSS output enabled: used only when the device operates in master mode.
*
* Software NSS management:
* - External NSS pin remains free for other application uses.
*
*/
/* Hardware master NSS output disabled */
#define STM32_PIN_SPI_MASTER_NSS (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT)
/* Hardware master NSS output enabled */
#define STM32_PIN_SPI_MASTER_NSS_OE (STM32_MODE_OUTPUT | \
STM32_CNF_ALT_FUNC | \
STM32_CNF_PUSH_PULL)
#define STM32_PIN_SPI_SLAVE_NSS (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT)
#define STM32_PIN_USB (STM32_MODE_INPUT | STM32_CNF_IN_PUPD)
#endif /* ZEPHYR_STM32_PINCTRLF1_H_ */