diff --git a/drivers/serial/uart_pl011.c b/drivers/serial/uart_pl011.c index 5cc9eda5729..fb4a215db8d 100644 --- a/drivers/serial/uart_pl011.c +++ b/drivers/serial/uart_pl011.c @@ -419,23 +419,28 @@ void pl011_isr(void *arg) static void pl011_irq_config_func_0(struct device *dev); #endif +#ifndef DT_INST_0_ARM_PL011_CLOCK_FREQUENCY +#define DT_INST_0_ARM_PL011_CLOCK_FREQUENCY \ + DT_INST_0_ARM_PL011_CLOCKS_CLOCK_FREQUENCY +#endif + static struct uart_device_config pl011_cfg_port_0 = { - .base = (u8_t *)DT_PL011_PORT0_BASE_ADDRESS, - .sys_clk_freq = DT_PL011_PORT0_CLOCK_FREQUENCY, + .base = (u8_t *)DT_INST_0_ARM_PL011_BASE_ADDRESS, + .sys_clk_freq = DT_INST_0_ARM_PL011_CLOCK_FREQUENCY, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .irq_config_func = pl011_irq_config_func_0, #endif }; static struct pl011_data pl011_data_port_0 = { - .baud_rate = DT_PL011_PORT0_BAUD_RATE, + .baud_rate = DT_INST_0_ARM_PL011_CURRENT_SPEED, #if defined(CONFIG_UART_PL011_SHARED_IRQ) .shared_irq_dev_name = DT_INST_0_SHARED_IRQ_LABEL, #endif }; DEVICE_AND_API_INIT(pl011_port_0, - DT_PL011_PORT0_NAME, + DT_INST_0_ARM_PL011_LABEL, &pl011_init, &pl011_data_port_0, &pl011_cfg_port_0, PRE_KERNEL_1, @@ -453,26 +458,26 @@ static void pl011_irq_config_func_0(struct device *dev) shared_irq_isr_register(shared_irq_dev, (isr_t)pl011_isr, dev); shared_irq_enable(shared_irq_dev, dev); #else - IRQ_CONNECT(DT_PL011_PORT0_IRQ_TX, - DT_PL011_PORT0_IRQ_PRI, + IRQ_CONNECT(DT_INST_0_ARM_PL011_IRQ_TX, + DT_INST_0_ARM_PL011_IRQ_TX_PRIORITY, pl011_isr, DEVICE_GET(pl011_port_0), 0); - irq_enable(DT_PL011_PORT0_IRQ_TX); + irq_enable(DT_INST_0_ARM_PL011_IRQ_TX); - IRQ_CONNECT(DT_PL011_PORT0_IRQ_RX, - DT_PL011_PORT0_IRQ_PRI, + IRQ_CONNECT(DT_INST_0_ARM_PL011_IRQ_RX, + DT_INST_0_ARM_PL011_IRQ_RX_PRIORITY, pl011_isr, DEVICE_GET(pl011_port_0), 0); - irq_enable(DT_PL011_PORT0_IRQ_RX); + irq_enable(DT_INST_0_ARM_PL011_IRQ_RX); - IRQ_CONNECT(DT_PL011_PORT0_IRQ_RXTIM, - DT_PL011_PORT0_IRQ_PRI, + IRQ_CONNECT(DT_INST_0_ARM_PL011_IRQ_RXTIM, + DT_INST_0_ARM_PL011_IRQ_RXTIM_PRIORITY, pl011_isr, DEVICE_GET(pl011_port_0), 0); - irq_enable(DT_PL011_PORT0_IRQ_RXTIM); + irq_enable(DT_INST_0_ARM_PL011_IRQ_RXTIM); #endif } #endif @@ -485,23 +490,28 @@ static void pl011_irq_config_func_0(struct device *dev) static void pl011_irq_config_func_1(struct device *dev); #endif +#ifndef DT_INST_1_ARM_PL011_CLOCK_FREQUENCY +#define DT_INST_1_ARM_PL011_CLOCK_FREQUENCY \ + DT_INST_1_ARM_PL011_CLOCKS_CLOCK_FREQUENCY +#endif + static struct uart_device_config pl011_cfg_port_1 = { - .base = (u8_t *)DT_PL011_PORT1_BASE_ADDRESS, - .sys_clk_freq = DT_PL011_PORT1_CLOCK_FREQUENCY, + .base = (u8_t *)DT_INST_1_ARM_PL011_BASE_ADDRESS, + .sys_clk_freq = DT_INST_1_ARM_PL011_CLOCK_FREQUENCY, #ifdef CONFIG_UART_INTERRUPT_DRIVEN .irq_config_func = pl011_irq_config_func_1, #endif }; static struct pl011_data pl011_data_port_1 = { - .baud_rate = DT_PL011_PORT1_BAUD_RATE, + .baud_rate = DT_INST_1_ARM_PL011_CURRENT_SPEED, #if defined(CONFIG_UART_PL011_SHARED_IRQ) .shared_irq_dev_name = DT_INST_1_SHARED_IRQ_LABEL, #endif }; DEVICE_AND_API_INIT(pl011_port_1, - DT_PL011_PORT1_NAME, + DT_INST_1_ARM_PL011_LABEL, &pl011_init, &pl011_data_port_1, &pl011_cfg_port_1, PRE_KERNEL_1, @@ -519,26 +529,26 @@ static void pl011_irq_config_func_1(struct device *dev) shared_irq_isr_register(shared_irq_dev, (isr_t)pl011_isr, dev); shared_irq_enable(shared_irq_dev, dev); #else - IRQ_CONNECT(DT_PL011_PORT1_IRQ_TX, - DT_PL011_PORT1_IRQ_PRI, + IRQ_CONNECT(DT_INST_1_ARM_PL011_IRQ_TX, + DT_INST_1_ARM_PL011_IRQ_TX_PRIORITY, pl011_isr, - DEVICE_GET(pl011_port_1), + DEVICE_GET(pl011_port_0), 0); - irq_enable(DT_PL011_PORT1_IRQ_TX); + irq_enable(DT_INST_1_ARM_PL011_IRQ_TX); - IRQ_CONNECT(DT_PL011_PORT1_IRQ_RX, - DT_PL011_PORT1_IRQ_PRI, + IRQ_CONNECT(DT_INST_1_ARM_PL011_IRQ_RX, + DT_INST_1_ARM_PL011_IRQ_RX_PRIORITY, pl011_isr, - DEVICE_GET(pl011_port_1), + DEVICE_GET(pl011_port_0), 0); - irq_enable(DT_PL011_PORT1_IRQ_RX); + irq_enable(DT_INST_1_ARM_PL011_IRQ_RX); - IRQ_CONNECT(DT_PL011_PORT1_IRQ_RXTIM, - DT_PL011_PORT1_IRQ_PRI, + IRQ_CONNECT(DT_INST_1_ARM_PL011_IRQ_RXTIM, + DT_INST_1_ARM_PL011_IRQ_RXTIM_PRIORITY, pl011_isr, - DEVICE_GET(pl011_port_1), + DEVICE_GET(pl011_port_0), 0); - irq_enable(DT_PL011_PORT1_IRQ_RXTIM); + irq_enable(DT_INST_1_ARM_PL011_IRQ_RXTIM); #endif } #endif diff --git a/soc/arm/arm/musca_a/dts_fixup.h b/soc/arm/arm/musca_a/dts_fixup.h index fb1629903ee..32a0592114a 100644 --- a/soc/arm/arm/musca_a/dts_fixup.h +++ b/soc/arm/arm/musca_a/dts_fixup.h @@ -12,27 +12,6 @@ #if defined (CONFIG_ARM_NONSECURE_FIRMWARE) -/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */ -#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_40101000_BASE_ADDRESS -#define DT_PL011_PORT0_IRQ_TX DT_ARM_PL011_40101000_IRQ_TX -#define DT_PL011_PORT0_IRQ_RX DT_ARM_PL011_40101000_IRQ_RX -#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_40101000_IRQ_RXTIM -#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_40101000_IRQ_ERR -#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_40101000_IRQ_0_PRIORITY -#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_40101000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_40101000_CURRENT_SPEED -#define DT_PL011_PORT0_NAME DT_ARM_PL011_40101000_LABEL - -#define DT_PL011_PORT1_BASE_ADDRESS DT_ARM_PL011_40102000_BASE_ADDRESS -#define DT_PL011_PORT1_IRQ_TX DT_ARM_PL011_40102000_IRQ_TX -#define DT_PL011_PORT1_IRQ_RX DT_ARM_PL011_40102000_IRQ_RX -#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_40102000_IRQ_RXTIM -#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_40102000_IRQ_ERR -#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_40102000_IRQ_0_PRIORITY -#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_40102000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_40102000_CURRENT_SPEED -#define DT_PL011_PORT1_NAME DT_ARM_PL011_40102000_LABEL - /* SCC */ #define DT_ARM_SCC_BASE_ADDRESS DT_ARM_SCC_4010C000_BASE_ADDRESS @@ -42,27 +21,6 @@ #else -/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */ -#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_50101000_BASE_ADDRESS -#define DT_PL011_PORT0_IRQ_TX DT_ARM_PL011_50101000_IRQ_TX -#define DT_PL011_PORT0_IRQ_RX DT_ARM_PL011_50101000_IRQ_RX -#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_50101000_IRQ_RXTIM -#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_50101000_IRQ_ERR -#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_50101000_IRQ_0_PRIORITY -#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_50101000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_50101000_CURRENT_SPEED -#define DT_PL011_PORT0_NAME DT_ARM_PL011_50101000_LABEL - -#define DT_PL011_PORT1_BASE_ADDRESS DT_ARM_PL011_50102000_BASE_ADDRESS -#define DT_PL011_PORT1_IRQ_TX DT_ARM_PL011_50102000_IRQ_TX -#define DT_PL011_PORT1_IRQ_RX DT_ARM_PL011_50102000_IRQ_RX -#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_50102000_IRQ_RXTIM -#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_50102000_IRQ_ERR -#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_50102000_IRQ_0_PRIORITY -#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_50102000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_50102000_CURRENT_SPEED -#define DT_PL011_PORT1_NAME DT_ARM_PL011_50102000_LABEL - /* SCC */ #define DT_ARM_SCC_BASE_ADDRESS DT_ARM_SCC_5010C000_BASE_ADDRESS diff --git a/soc/arm/arm/musca_b1/dts_fixup.h b/soc/arm/arm/musca_b1/dts_fixup.h index bd8e4f9171e..e6103173678 100644 --- a/soc/arm/arm/musca_b1/dts_fixup.h +++ b/soc/arm/arm/musca_b1/dts_fixup.h @@ -12,27 +12,6 @@ #if defined (CONFIG_ARM_NONSECURE_FIRMWARE) -/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */ -#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_40105000_BASE_ADDRESS -#define DT_PL011_PORT0_IRQ_TX DT_ARM_PL011_40105000_IRQ_TX -#define DT_PL011_PORT0_IRQ_RX DT_ARM_PL011_40105000_IRQ_RX -#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_40105000_IRQ_RXTIM -#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_40105000_IRQ_ERR -#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_40105000_IRQ_0_PRIORITY -#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_40105000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_40105000_CURRENT_SPEED -#define DT_PL011_PORT0_NAME DT_ARM_PL011_40105000_LABEL - -#define DT_PL011_PORT1_BASE_ADDRESS DT_ARM_PL011_40106000_BASE_ADDRESS -#define DT_PL011_PORT1_IRQ_TX DT_ARM_PL011_40106000_IRQ_TX -#define DT_PL011_PORT1_IRQ_RX DT_ARM_PL011_40106000_IRQ_RX -#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_40106000_IRQ_RXTIM -#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_40106000_IRQ_ERR -#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_40106000_IRQ_0_PRIORITY -#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_40106000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_40106000_CURRENT_SPEED -#define DT_PL011_PORT1_NAME DT_ARM_PL011_40106000_LABEL - /* SCC */ #define DT_ARM_SCC_BASE_ADDRESS DT_ARM_SCC_4010B000_BASE_ADDRESS @@ -41,27 +20,6 @@ #define DT_IRQ_PORT0_ALL DT_ARM_CMSDK_GPIO_41000000_IRQ_0 #else -/* CMSDK APB Universal Asynchronous Receiver-Transmitter (UART) */ -#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_50105000_BASE_ADDRESS -#define DT_PL011_PORT0_IRQ_TX DT_ARM_PL011_50105000_IRQ_TX -#define DT_PL011_PORT0_IRQ_RX DT_ARM_PL011_50105000_IRQ_RX -#define DT_PL011_PORT0_IRQ_RXTIM DT_ARM_PL011_50105000_IRQ_RXTIM -#define DT_PL011_PORT0_IRQ_ERR DT_ARM_PL011_50105000_IRQ_ERR -#define DT_PL011_PORT0_IRQ_PRI DT_ARM_PL011_50105000_IRQ_0_PRIORITY -#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_50105000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_50105000_CURRENT_SPEED -#define DT_PL011_PORT0_NAME DT_ARM_PL011_50105000_LABEL - -#define DT_PL011_PORT1_BASE_ADDRESS DT_ARM_PL011_50106000_BASE_ADDRESS -#define DT_PL011_PORT1_IRQ_TX DT_ARM_PL011_50106000_IRQ_TX -#define DT_PL011_PORT1_IRQ_RX DT_ARM_PL011_50106000_IRQ_RX -#define DT_PL011_PORT1_IRQ_RXTIM DT_ARM_PL011_50106000_IRQ_RXTIM -#define DT_PL011_PORT1_IRQ_ERR DT_ARM_PL011_50106000_IRQ_ERR -#define DT_PL011_PORT1_IRQ_PRI DT_ARM_PL011_50106000_IRQ_0_PRIORITY -#define DT_PL011_PORT1_CLOCK_FREQUENCY DT_ARM_PL011_50106000_CLOCKS_CLOCK_FREQUENCY -#define DT_PL011_PORT1_BAUD_RATE DT_ARM_PL011_50106000_CURRENT_SPEED -#define DT_PL011_PORT1_NAME DT_ARM_PL011_50106000_LABEL - /* SCC */ #define DT_ARM_SCC_BASE_ADDRESS DT_ARM_SCC_5010B000_BASE_ADDRESS diff --git a/soc/arm/qemu_cortex_a53/dts_fixup.h b/soc/arm/qemu_cortex_a53/dts_fixup.h index f34048bdc9e..390c8a1455e 100644 --- a/soc/arm/qemu_cortex_a53/dts_fixup.h +++ b/soc/arm/qemu_cortex_a53/dts_fixup.h @@ -4,12 +4,6 @@ * SPDX-License-Identifier: Apache-2.0 */ -#define DT_PL011_PORT0_BASE_ADDRESS DT_ARM_PL011_9000000_BASE_ADDRESS -#define DT_PL011_PORT0_SIZE DT_ARM_PL011_9000000_SIZE -#define DT_PL011_PORT0_NAME DT_ARM_PL011_9000000_LABEL -#define DT_PL011_PORT0_CLOCK_FREQUENCY DT_ARM_PL011_9000000_CLOCK_FREQUENCY -#define DT_PL011_PORT0_BAUD_RATE DT_ARM_PL011_9000000_CURRENT_SPEED - #define DT_INST_0_SHARED_IRQ_IRQ_0_SENSE DT_INST_0_SHARED_IRQ_IRQ_0_FLAGS #undef DT_INST_0_SHARED_IRQ_IRQ_0 diff --git a/soc/arm/qemu_cortex_a53/mmu_regions.c b/soc/arm/qemu_cortex_a53/mmu_regions.c index 38306e9dad9..86e46a7d4ac 100644 --- a/soc/arm/qemu_cortex_a53/mmu_regions.c +++ b/soc/arm/qemu_cortex_a53/mmu_regions.c @@ -18,8 +18,8 @@ static const struct arm_mmu_region mmu_regions[] = { MT_DEVICE_nGnRnE | MT_RW | MT_SECURE), MMU_REGION_FLAT_ENTRY("UART", - DT_PL011_PORT0_BASE_ADDRESS, - DT_PL011_PORT0_SIZE, + DT_INST_0_ARM_PL011_BASE_ADDRESS, + DT_INST_0_ARM_PL011_SIZE, MT_DEVICE_nGnRnE | MT_RW | MT_SECURE), MMU_REGION_FLAT_ENTRY("SRAM",