boards: nordic: add nRF54L15 FLPR for nRF54L15PDK

Add nRF54L15 FLPR core to nRF54L15PDK board configuration.

Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>

boards/nordic/nrf54l15pdk/Kconfig.nrf54l15pdk

@@ -1,5 +1,7 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
-config BOARD_NRF54L15PDK_NRF54L15_CPUAPP
+config BOARD_NRF54L15PDK
-	select SOC_NRF54L15_ENGA_CPUAPP
+	select SOC_NRF54L15_ENGA_CPUAPP if BOARD_NRF54L15PDK_NRF54L15_CPUAPP
+	select SOC_NRF54L15_ENGA_CPUFLPR if BOARD_NRF54L15PDK_NRF54L15_CPUFLPR || \
+					    BOARD_NRF54L15PDK_NRF54L15_CPUFLPR_XIP

boards/nordic/nrf54l15pdk/board.cmake

@@ -1,7 +1,11 @@
 # Copyright (c) 2024 Nordic Semiconductor ASA
 # SPDX-License-Identifier: Apache-2.0
 
-board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
+if (CONFIG_BOARD_NRF54L15PDK_NRF54L15_CPUAPP)
+  board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
+elseif (CONFIG_BOARD_NRF54L15PDK_NRF54L15_CPUFLPR)
+  board_runner_args(jlink "--speed=4000")
+endif()
 
 include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
 include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)

boards/nordic/nrf54l15pdk/board.yml

@@ -3,6 +3,9 @@ board:
   vendor: nordic
   socs:
   - name: nrf54l15
+    variants:
+    - name: xip
+      cpucluster: cpuflpr
   revision:
     format: major.minor.patch
     default: "0.2.1"

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15-common.dtsi

@@ -0,0 +1,79 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54l15pdk_nrf54l15-pinctrl.dtsi"
+
+/ {
+	leds {
+		compatible = "gpio-leds";
+		led0: led_0 {
+			gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+			label = "Green LED 0";
+		};
+		led1: led_1 {
+			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+			label = "Green LED 1";
+		};
+		led2: led_2 {
+			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+			label = "Green LED 2";
+		};
+		led3: led_3 {
+			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+			label = "Green LED 3";
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+		button0: button_0 {
+			gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "Push button 0";
+			zephyr,code = <INPUT_KEY_0>;
+		};
+		button1: button_1 {
+			gpios = <&gpio1 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "Push button 1";
+			zephyr,code = <INPUT_KEY_1>;
+		};
+		button2: button_2 {
+			gpios = <&gpio2 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "Push button 2";
+			zephyr,code = <INPUT_KEY_2>;
+		};
+		button3: button_3 {
+			gpios = <&gpio2 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+			label = "Push button 3";
+			zephyr,code = <INPUT_KEY_3>;
+		};
+	};
+
+	aliases {
+		led0 = &led0;
+		led1 = &led1;
+		led2 = &led2;
+		led3 = &led3;
+		sw0 = &button0;
+		sw1 = &button1;
+		sw2 = &button2;
+		sw3 = &button3;
+		watchdog0 = &wdt30;
+	};
+};
+
+&uart20 {
+	current-speed = <115200>;
+	pinctrl-0 = <&uart20_default>;
+	pinctrl-1 = <&uart20_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
+&uart30 {
+	current-speed = <115200>;
+	pinctrl-0 = <&uart30_default>;
+	pinctrl-1 = <&uart30_sleep>;
+	pinctrl-names = "default", "sleep";
+};

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15-pinctrl.dtsi

@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	/omit-if-no-ref/ uart20_default: uart20_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 1, 4)>,
+				<NRF_PSEL(UART_RTS, 1, 6)>;
+		};
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 1, 5)>,
+				<NRF_PSEL(UART_CTS, 1, 7)>;
+			bias-pull-up;
+		};
+	};
+
+	/omit-if-no-ref/ uart20_sleep: uart20_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 1, 4)>,
+				<NRF_PSEL(UART_RX, 1, 5)>,
+				<NRF_PSEL(UART_RTS, 1, 6)>,
+				<NRF_PSEL(UART_CTS, 1, 7)>;
+			low-power-enable;
+		};
+	};
+
+	/omit-if-no-ref/ uart30_default: uart30_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 0)>,
+				<NRF_PSEL(UART_RTS, 0, 2)>;
+		};
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 0, 1)>,
+				<NRF_PSEL(UART_CTS, 0, 3)>;
+			bias-pull-up;
+		};
+	};
+
+	/omit-if-no-ref/ uart30_sleep: uart30_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 0)>,
+				<NRF_PSEL(UART_RX, 0, 1)>,
+				<NRF_PSEL(UART_RTS, 0, 2)>,
+				<NRF_PSEL(UART_CTS, 0, 3)>;
+			low-power-enable;
+		};
+	};
+};

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_common_0_3_0.dtsi

@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&led0 {
+	gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+};
+
+&led1 {
+	gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
+};
+
+&led2 {
+	gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
+};
+
+&led3 {
+	gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+};
+
+&button0 {
+	gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+};
+
+&button1 {
+	gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+};
+
+&button2 {
+	gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+};
+
+&button3 {
+	gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+};

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuapp-pinctrl.dtsi

@@ -1,36 +0,0 @@
-/*
- * Copyright (c) 2024 Nordic Semiconductor
- * SPDX-License-Identifier: Apache-2.0
- */
-
-&pinctrl {
-	uart20_default: uart20_default {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 4)>,
-				<NRF_PSEL(UART_RX, 1, 5)>;
-		};
-	};
-
-	uart20_sleep: uart20_sleep {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 1, 4)>,
-				<NRF_PSEL(UART_RX, 1, 5)>;
-			low-power-enable;
-		};
-	};
-
-	uart30_default: uart30_default {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 0, 0)>,
-				<NRF_PSEL(UART_RX, 0, 1)>;
-		};
-	};
-
-	uart30_sleep: uart30_sleep {
-		group1 {
-			psels = <NRF_PSEL(UART_TX, 0, 0)>,
-				<NRF_PSEL(UART_RX, 0, 1)>;
-			low-power-enable;
-		};
-	};
-};

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuapp.dts

@@ -6,78 +6,26 @@
 
 /dts-v1/;
 #include <nordic/nrf54l15_cpuapp.dtsi>
-#include "nrf54l15pdk_nrf54l15_cpuapp-pinctrl.dtsi"
+#include "nrf54l15pdk_nrf54l15-common.dtsi"
-#include <zephyr/dt-bindings/input/input-event-codes.h>
 
 / {
-	model = "Nordic nRF54L15 PDK nRF54L15 Application MCU";
 	compatible = "nordic,nrf54l15pdk_nrf54l15-cpuapp";
+	model = "Nordic nRF54L15 PDK nRF54L15 Application MCU";
 
 	chosen {
 		zephyr,console = &uart20;
 		zephyr,shell-uart = &uart20;
 		zephyr,uart-mcumgr = &uart20;
-		zephyr,sram = &sram0;
+		zephyr,flash-controller = &rram_controller;
-		zephyr,flash = &rram0;
+		zephyr,flash = &cpuapp_rram;
 		zephyr,code-partition = &slot0_partition;
+		zephyr,sram = &cpuapp_sram;
 		zephyr,ieee802154 = &ieee802154;
 	};
+};
 
-	leds {
+&cpuapp_sram {
-		compatible = "gpio-leds";
+	status = "okay";
-		led0: led_0 {
-			gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
-			label = "Green LED 0";
-		};
-		led1: led_1 {
-			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
-			label = "Green LED 1";
-		};
-		led2: led_2 {
-			gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
-			label = "Green LED 2";
-		};
-		led3: led_3 {
-			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
-			label = "Green LED 3";
-		};
-	};
-
-	buttons {
-		compatible = "gpio-keys";
-		button0: button_0 {
-			gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-			label = "Push button 0";
-			zephyr,code = <INPUT_KEY_0>;
-		};
-		button1: button_1 {
-			gpios = <&gpio1 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-			label = "Push button 1";
-			zephyr,code = <INPUT_KEY_1>;
-		};
-		button2: button_2 {
-			gpios = <&gpio2 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-			label = "Push button 2";
-			zephyr,code = <INPUT_KEY_2>;
-		};
-		button3: button_3 {
-			gpios = <&gpio2 10 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-			label = "Push button 3";
-			zephyr,code = <INPUT_KEY_3>;
-		};
-	};
-
-	aliases {
-		led0 = &led0;
-		led1 = &led1;
-		led2 = &led2;
-		led3 = &led3;
-		watchdog0 = &wdt30;
-		sw0 = &button0;
-		sw1 = &button1;
-		sw2 = &button2;
-		sw3 = &button3;
-	};
 };
 
 &lfxo {
@@ -90,22 +38,47 @@
 	load-capacitance-femtofarad = <15000>;
 };
 
-&uart20 {
-	status = "okay";
-	current-speed = <115200>;
-	pinctrl-0 = <&uart20_default>;
-	pinctrl-1 = <&uart20_sleep>;
-	pinctrl-names = "default", "sleep";
-};
-
-&uart30 {
-	current-speed = <115200>;
-	pinctrl-0 = <&uart30_default>;
-	pinctrl-1 = <&uart30_sleep>;
-	pinctrl-names = "default", "sleep";
-};
-
 &grtc {
+	owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11>;
+	/* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
+	child-owned-channels = <3 4 7 8 9 10 11>;
+	status = "okay";
+};
+
+&cpuapp_rram {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		boot_partition: partition@0 {
+			label = "mcuboot";
+			reg = <0x0 DT_SIZE_K(64)>;
+		};
+		slot0_partition: partition@10000 {
+			label = "image-0";
+			reg = <0x10000 DT_SIZE_K(324)>;
+		};
+		slot0_ns_partition: partition@61000 {
+			label = "image-0-nonsecure";
+			reg = <0x61000 DT_SIZE_K(324)>;
+		};
+		slot1_partition: partition@b2000 {
+			label = "image-1";
+			reg = <0xb2000 DT_SIZE_K(324)>;
+		};
+		slot1_ns_partition: partition@103000 {
+			label = "image-1-nonsecure";
+			reg = <0x103000 DT_SIZE_K(324)>;
+		};
+		/* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */
+		storage_partition: partition@15c000 {
+			label = "storage";
+			reg = <0x15c000 DT_SIZE_K(36)>;
+		};
+	};
+};
+
+&uart20 {
 	status = "okay";
 };
 
@@ -129,6 +102,10 @@
 	status = "okay";
 };
 
+&radio {
+	status = "okay";
+};
+
 &ieee802154 {
 	status = "okay";
 };
@@ -137,39 +114,6 @@
 	status = "okay";
 };
 
-&rram0 {
-	partitions {
-		compatible = "fixed-partitions";
-		#address-cells = <1>;
-		#size-cells = <1>;
-		boot_partition: partition@0 {
-			label = "mcuboot";
-			reg = <0x0 DT_SIZE_K(64)>;
-		};
-		slot0_partition: partition@10000 {
-			label = "image-0";
-			reg = <0x10000 DT_SIZE_K(348)>;
-		};
-		slot0_ns_partition: partition@67000 {
-			label = "image-0-nonsecure";
-			reg = <0x67000 DT_SIZE_K(348)>;
-		};
-		slot1_partition: partition@be000 {
-			label = "image-1";
-			reg = <0xbe000 DT_SIZE_K(348)>;
-		};
-		slot1_ns_partition: partition@115000 {
-			label = "image-1-nonsecure";
-			reg = <0x115000 DT_SIZE_K(348)>;
-		};
-		/* 32k from 0x16c000 to 0x173fff reserved for TF-M partitions */
-		storage_partition: partition@174000 {
-			label = "storage";
-			reg = <0x174000 DT_SIZE_K(36)>;
-		};
-	};
-};
-
 &clock {
 	status = "okay";
 };

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuapp.yaml

@@ -9,8 +9,8 @@ toolchain:
   - gnuarmemb
   - xtools
   - zephyr
-ram: 256
+ram: 188
-flash: 1536
+flash: 324
 supported:
   - counter
   - gpio

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuapp_0_3_0.overlay

@@ -4,35 +4,4 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
-
+#include "nrf54l15pdk_nrf54l15_common_0_3_0.dtsi"
-&led0 {
-	gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
-};
-
-&led1 {
-	gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
-};
-
-&led2 {
-	gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
-};
-
-&led3 {
-	gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
-};
-
-&button0 {
-	gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-};
-
-&button1 {
-	gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-};
-
-&button2 {
-	gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-};
-
-&button3 {
-	gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
-};

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuapp_defconfig

@@ -8,6 +8,9 @@ CONFIG_SERIAL=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
 
+# Enable GPIO
+CONFIG_GPIO=y
+
 # Enable MPU
 CONFIG_ARM_MPU=y
 
@@ -22,13 +25,6 @@ CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
 CONFIG_CACHE_MANAGEMENT=y
 CONFIG_EXTERNAL_CACHE=y
 
-CONFIG_UART_CONSOLE=y
-CONFIG_CONSOLE=y
-CONFIG_SERIAL=y
-
-# Enable GPIO
-CONFIG_GPIO=y
-
 CONFIG_SOC_NRF_FORCE_CONSTLAT=y
 
 # Start SYSCOUNTER on driver init

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuflpr.dts

@@ -0,0 +1,71 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <nordic/nrf54l15_cpuflpr.dtsi>
+#include "nrf54l15pdk_nrf54l15-common.dtsi"
+
+/ {
+	model = "Nordic nRF54L15 PDK nRF54L15 FLPR MCU";
+	compatible = "nordic,nrf54l15pdk_nrf54l15-cpuflpr";
+
+	chosen {
+		zephyr,console = &uart30;
+		zephyr,shell-uart = &uart30;
+		zephyr,code-partition = &cpuflpr_code_partition;
+		zephyr,flash = &cpuflpr_rram;
+		zephyr,sram = &cpuflpr_sram;
+	};
+};
+
+&cpuflpr_sram {
+	status = "okay";
+	/* size must be increased due to booting from SRAM */
+	reg = <0x20028000 DT_SIZE_K(96)>;
+	ranges = <0x0 0x20028000 0x18000>;
+};
+
+&cpuflpr_rram {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		cpuflpr_code_partition: partition@0 {
+			label = "image-0";
+			reg = <0x0 DT_SIZE_K(96)>;
+		};
+	};
+};
+
+&grtc {
+	owned-channels = <3 4>;
+	status = "okay";
+};
+
+&uart30 {
+	status = "okay";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio2 {
+	status = "okay";
+};
+
+&gpiote20 {
+	status = "okay";
+};
+
+&gpiote30 {
+	status = "okay";
+};

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuflpr.yaml

@@ -0,0 +1,17 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: nrf54l15pdk/nrf54l15/cpuflpr
+name: nRF54L15-PDK-nRF54L15-Fast-Lightweight-Peripheral-Processor
+type: mcu
+arch: riscv
+toolchain:
+  - zephyr
+ram: 96
+flash: 96
+supported:
+  - counter
+  - gpio
+  - i2c
+  - spi
+  - watchdog

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuflpr_0_3_0.overlay

@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54l15pdk_nrf54l15_common_0_3_0.dtsi"

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuflpr_defconfig

@@ -0,0 +1,19 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+CONFIG_USE_DT_CODE_PARTITION=y
+
+# Execute from SRAM
+CONFIG_XIP=n
+
+CONFIG_RISCV_ALWAYS_SWITCH_THROUGH_ECALL=y

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuflpr_xip.dts

@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "nrf54l15pdk_nrf54l15_cpuflpr.dts"
+
+&cpuflpr_sram {
+	reg = <0x2002f000 DT_SIZE_K(68)>;
+	ranges = <0x0 0x2002f000 0x11000>;
+};

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuflpr_xip.yaml

@@ -0,0 +1,17 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: nrf54l15pdk/nrf54l15/cpuflpr/xip
+name: nRF54L15-PDK-nRF54L15-Fast-Lightweight-Peripheral-Processor (RRAM XIP)
+type: mcu
+arch: riscv
+toolchain:
+  - zephyr
+ram: 68
+flash: 96
+supported:
+  - counter
+  - gpio
+  - i2c
+  - spi
+  - watchdog

boards/nordic/nrf54l15pdk/nrf54l15pdk_nrf54l15_cpuflpr_xip_defconfig

@@ -0,0 +1,17 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+# Enable UART driver
+CONFIG_SERIAL=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+
+# Enable GPIO
+CONFIG_GPIO=y
+
+# Execute from RRAM
+CONFIG_XIP=y
+
+CONFIG_RISCV_ALWAYS_SWITCH_THROUGH_ECALL=y