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intel_s1000: various fixes for build errors

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Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit is contained in:
Anas Nashif 2020-01-31 10:01:16 -05:00
commit aa14022c8a
5 changed files with 7 additions and 6 deletions
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7
drivers/interrupt_controller/intc_dw.c
View file

@ -46,7 +46,7 @@ static int dw_ictl_initialize(struct device *dev)
static void dw_ictl_isr(void *arg) static void dw_ictl_isr(void *arg)
{ {
struct device *devt = (struct device *)arg; struct device *dev = (struct device *)arg;
const struct dw_ictl_config *config = dev->config->config_info; const struct dw_ictl_config *config = dev->config->config_info;
volatile struct dw_ictl_registers * const regs = volatile struct dw_ictl_registers * const regs =
(struct dw_ictl_registers *)config->base_addr; (struct dw_ictl_registers *)config->base_addr;
@ -62,7 +62,7 @@ static void dw_ictl_isr(void *arg)
static inline void dw_ictl_intr_enable(struct device *dev, unsigned int irq) static inline void dw_ictl_intr_enable(struct device *dev, unsigned int irq)
{ {
const struct dw_ictl_config *config = dev->config->config_info const struct dw_ictl_config *config = dev->config->config_info;
volatile struct dw_ictl_registers * const regs = volatile struct dw_ictl_registers * const regs =
(struct dw_ictl_registers *)config->base_addr; (struct dw_ictl_registers *)config->base_addr;
@ -75,7 +75,7 @@ static inline void dw_ictl_intr_enable(struct device *dev, unsigned int irq)
static inline void dw_ictl_intr_disable(struct device *dev, unsigned int irq) static inline void dw_ictl_intr_disable(struct device *dev, unsigned int irq)
{ {
const struct dw_ictl_config *config = dev->config->config_info const struct dw_ictl_config *config = dev->config->config_info;
volatile struct dw_ictl_registers * const regs = volatile struct dw_ictl_registers * const regs =
(struct dw_ictl_registers *)config->base_addr; (struct dw_ictl_registers *)config->base_addr;
@ -126,7 +126,6 @@ static int dw_ictl_intr_get_line_state(struct device *dev, unsigned int irq)
static void dw_ictl_config_irq(struct device *dev); static void dw_ictl_config_irq(struct device *dev);
static const struct dw_ictl_config dw_config = { static const struct dw_ictl_config dw_config = {
.irq_num = DT_INTC_DW_0_BASE_ADDR,
.numirqs = DT_INTC_DW_0_NUM_IRQS, .numirqs = DT_INTC_DW_0_NUM_IRQS,
.isr_table_offset = CONFIG_DW_ISR_TBL_OFFSET, .isr_table_offset = CONFIG_DW_ISR_TBL_OFFSET,
.config_func = dw_ictl_config_irq, .config_func = dw_ictl_config_irq,

1
drivers/interrupt_controller/intc_dw.h
View file

@ -16,6 +16,7 @@ extern "C" {
typedef void (*dw_ictl_config_irq_t)(struct device *dev); typedef void (*dw_ictl_config_irq_t)(struct device *dev);
struct dw_ictl_config { struct dw_ictl_config {
u32_t base_addr;
u32_t numirqs; u32_t numirqs;
u32_t isr_table_offset; u32_t isr_table_offset;
dw_ictl_config_irq_t config_func; dw_ictl_config_irq_t config_func;

1
dts/xtensa/intel/intel_s1000.dtsi
View file

@ -95,6 +95,7 @@
interrupts = <6 0 0>; interrupts = <6 0 0>;
num-irqs = <9>; num-irqs = <9>;
interrupt-parent = <&cavs0>; interrupt-parent = <&cavs0>;
label = "DW_INTC";
}; };
gpio0: gpio@80c00 { gpio0: gpio@80c00 {

2
soc/xtensa/intel_s1000/dts_fixup.h
View file

@ -38,7 +38,7 @@
#define DT_INTC_DW_0_BASE_ADDR \ #define DT_INTC_DW_0_BASE_ADDR \
DT_SNPS_DESIGNWARE_INTC_81800_BASE_ADDRESS DT_SNPS_DESIGNWARE_INTC_81800_BASE_ADDRESS
#define DT_INTC_DW_0_NAME DT_SNPS_DESIGNWARE_INTC_81800_LABEL #define DT_INTC_DW_0_NAME DT_SNPS_DESIGNWARE_INTC_81800_LABEL
#define DT_INTC_DW_0_IRQ DDT_SNPS_DESIGNWARE_INTC_81800_IRQ_0 #define DT_INTC_DW_0_IRQ DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0
#define DT_INTC_DW_0_IRQ_PRI \ #define DT_INTC_DW_0_IRQ_PRI \
DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_PRIORITY DT_SNPS_DESIGNWARE_INTC_81800_IRQ_0_PRIORITY
#define DT_INTC_DW_0_IRQ_FLAGS \ #define DT_INTC_DW_0_IRQ_FLAGS \

2
soc/xtensa/intel_s1000/soc.h
View file

@ -43,7 +43,7 @@
#define IOAPIC_HIGH 0 #define IOAPIC_HIGH 0
/* DW interrupt controller */ /* DW interrupt controller */
#define DW_ICTL_IRQ_CAVS_OFFSET CAVS_IRQ_NUMBER(DT_DW_ICTL_IRQ) #define DW_ICTL_IRQ_CAVS_OFFSET CAVS_IRQ_NUMBER(DT_INTC_DW_0_IRQ)
#define DW_ICTL_NUM_IRQS 9 #define DW_ICTL_NUM_IRQS 9
/* GPIO */ /* GPIO */