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soc: nordic: nrf54h20: add support for nRF54H20 EngB

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nRF54H20 EngB is a re-label to the existing hardware revision for the
nRF54H20. nRF54H20 (whithout EngX) is becoming the final revision of the
SoC.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit is contained in:
Gerard Marull-Paretas 2024-09-18 10:17:33 +02:00 • committed by Carles Cufí
commit a9d0eacae2
7 changed files with 63 additions and 13 deletions
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24
soc/nordic/nrf54h/Kconfig
View file

@ -9,7 +9,8 @@ config SOC_SERIES_NRF54HX
select HAS_NORDIC_DRIVERS
select NRF_PLATFORM_HALTIUM
config SOC_NRF54H20_CPUAPP
config SOC_NRF54H20_CPUAPP_COMMON
bool
select ARM
select ARMV8_M_DSP
select CPU_CORTEX_M33
@ -29,7 +30,14 @@ config SOC_NRF54H20_CPUAPP
select HAS_PM
select HAS_POWEROFF
config SOC_NRF54H20_CPURAD
config SOC_NRF54H20_CPUAPP
select SOC_NRF54H20_CPUAPP_COMMON
config SOC_NRF54H20_ENGB_CPUAPP
select SOC_NRF54H20_CPUAPP_COMMON
config SOC_NRF54H20_CPURAD_COMMON
bool
select ARM
select ARMV8_M_DSP
select CPU_CORTEX_M33
@ -48,8 +56,20 @@ config SOC_NRF54H20_CPURAD
select HAS_PM
select HAS_POWEROFF
config SOC_NRF54H20_CPURAD
select SOC_NRF54H20_CPURAD_COMMON
config SOC_NRF54H20_ENGB_CPURAD
select SOC_NRF54H20_CPURAD_COMMON
config SOC_NRF54H20_CPUPPR
depends on RISCV_CORE_NORDIC_VPR
config SOC_NRF54H20_ENGB_CPUPPR
depends on RISCV_CORE_NORDIC_VPR
config SOC_NRF54H20_CPUFLPR
depends on RISCV_CORE_NORDIC_VPR
config SOC_NRF54H20_ENGB_CPUFLPR
depends on RISCV_CORE_NORDIC_VPR

4
soc/nordic/nrf54h/Kconfig.defconfig.nrf54h20_cpuapp
View file

@ -3,7 +3,7 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54H20_CPUAPP
if SOC_NRF54H20_CPUAPP || SOC_NRF54H20_ENGB_CPUAPP
config NUM_IRQS
default 471
@ -11,4 +11,4 @@ config NUM_IRQS
config NRF_REGTOOL_GENERATE_UICR
default y
endif # SOC_NRF54H20_CPUAPP
endif # SOC_NRF54H20_CPUAPP || SOC_NRF54H20_ENGB_CPUAPP

4
soc/nordic/nrf54h/Kconfig.defconfig.nrf54h20_cpuflpr
View file

@ -1,7 +1,7 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54H20_CPUFLPR
if SOC_NRF54H20_CPUFLPR || SOC_NRF54H20_ENGB_CPUFLPR
config NUM_IRQS
default 496
@ -10,4 +10,4 @@ config NUM_IRQS
config ASSERT
default n
endif # SOC_NRF54H20_CPUFLPR
endif # SOC_NRF54H20_CPUFLPR || SOC_NRF54H20_ENGB_CPUFLPR

4
soc/nordic/nrf54h/Kconfig.defconfig.nrf54h20_cpuppr
View file

@ -1,7 +1,7 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54H20_CPUPPR
if SOC_NRF54H20_CPUPPR || SOC_NRF54H20_ENGB_CPUPPR
config NUM_IRQS
default 496
@ -13,4 +13,4 @@ config SYS_CLOCK_TICKS_PER_SEC
config ASSERT
default n
endif # SOC_NRF54H20_CPUPPR
endif # SOC_NRF54H20_CPUPPR || SOC_NRF54H20_ENGB_CPUPPR

4
soc/nordic/nrf54h/Kconfig.defconfig.nrf54h20_cpurad
View file

@ -3,7 +3,7 @@
# Copyright (c) 2024 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
if SOC_NRF54H20_CPURAD
if SOC_NRF54H20_CPURAD || SOC_NRF54H20_ENGB_CPURAD
config NUM_IRQS
default 471
@ -11,4 +11,4 @@ config NUM_IRQS
config NRF_REGTOOL_GENERATE_UICR
default y
endif # SOC_NRF54H20_CPURAD
endif # SOC_NRF54H20_CPURAD || SOC_NRF54H20_ENGB_CPURAD

32
soc/nordic/nrf54h/Kconfig.soc
View file

@ -9,29 +9,59 @@ config SOC_NRF54H20
help
nRF54H20
config SOC_NRF54H20_ENGB
bool
select SOC_SERIES_NRF54HX
help
nRF54H20 (EngB)
config SOC_NRF54H20_CPUAPP
bool
select SOC_NRF54H20
help
nRF54H20 CPUAPP
config SOC_NRF54H20_ENGB_CPUAPP
bool
select SOC_NRF54H20_ENGB
help
nRF54H20 (EngB) CPUAPP
config SOC_NRF54H20_CPURAD
bool
select SOC_NRF54H20
help
nRF54H20 CPURAD
config SOC_NRF54H20_ENGB_CPURAD
bool
select SOC_NRF54H20_ENGB
help
nRF54H20 (EngB) CPURAD
config SOC_NRF54H20_CPUPPR
bool
select SOC_NRF54H20
help
nRF54H20 CPUPPR
config SOC_NRF54H20_ENGB_CPUPPR
bool
select SOC_NRF54H20_ENGB
help
nRF54H20 (EngB) CPUPPR
config SOC_NRF54H20_CPUFLPR
bool
select SOC_NRF54H20
help
nRF54H20 CPUFLPR
config SOC_NRF54H20_ENGB_CPUFLPR
bool
select SOC_NRF54H20_ENGB
help
nRF54H20 (EngB) CPUFLPR
config SOC
default "nrf54h20" if SOC_NRF54H20
default "nrf54h20" if SOC_NRF54H20 || SOC_NRF54H20_ENGB

4
soc/nordic/nrf54h/soc.h
View file

@ -9,7 +9,7 @@
#include <soc_nrf_common.h>
#if defined(CONFIG_SOC_NRF54H20_CPUAPP)
#if defined(CONFIG_SOC_NRF54H20_CPUAPP) || defined(CONFIG_SOC_NRF54H20_ENGB_CPUAPP)
#define RAMBLOCK_CONTROL_BIT_ICACHE MEMCONF_POWER_CONTROL_MEM1_Pos
#define RAMBLOCK_CONTROL_BIT_DCACHE MEMCONF_POWER_CONTROL_MEM2_Pos
#define RAMBLOCK_POWER_ID 0
@ -17,7 +17,7 @@
#define RAMBLOCK_RET_MASK (MEMCONF_POWER_RET_MEM0_Msk)
#define RAMBLOCK_RET_BIT_ICACHE MEMCONF_POWER_RET_MEM1_Pos
#define RAMBLOCK_RET_BIT_DCACHE MEMCONF_POWER_RET_MEM2_Pos
#elif defined(CONFIG_SOC_NRF54H20_CPURAD)
#elif defined(CONFIG_SOC_NRF54H20_CPURAD) || defined(CONFIG_SOC_NRF54H20_ENGB_CPURAD)
#define RAMBLOCK_CONTROL_BIT_ICACHE MEMCONF_POWER_CONTROL_MEM6_Pos
#define RAMBLOCK_CONTROL_BIT_DCACHE MEMCONF_POWER_CONTROL_MEM7_Pos
#define RAMBLOCK_POWER_ID 0