From a91c6e56c8bee32681d9e454d3b355f5ec71b0eb Mon Sep 17 00:00:00 2001 From: Anas Nashif Date: Fri, 5 Jul 2024 05:52:13 -0400 Subject: [PATCH] arch: use same syntax for custom arch calls Use same Kconfig syntax for those custom arch call. Signed-off-by: Anas Nashif --- arch/Kconfig | 10 ++++------ arch/arc/core/cpu_idle.S | 4 ++-- arch/arm/core/cortex_a_r/cpu_idle.S | 4 ++-- arch/arm/core/cortex_m/cpu_idle.c | 4 ++-- arch/arm64/core/cpu_idle.S | 4 ++-- arch/mips/core/cpu_idle.c | 4 ++-- arch/nios2/core/cpu_idle.c | 4 ++-- arch/riscv/core/cpu_idle.c | 4 ++-- arch/x86/core/cpuhalt.c | 4 ++-- arch/xtensa/core/cpu_idle.c | 4 ++-- soc/intel/intel_adsp/ace/Kconfig | 2 +- soc/intel/intel_adsp/ace/power.c | 4 ++-- soc/intel/intel_adsp/cavs/power.c | 2 +- soc/ite/ec/it8xxx2/Kconfig | 4 ++-- soc/nordic/common/vpr/Kconfig | 4 ++-- 15 files changed, 30 insertions(+), 32 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index 86a0e62c41b..2b096599ac0 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -1078,16 +1078,14 @@ config TOOLCHAIN_HAS_BUILTIN_FFS help Hidden option to signal that toolchain has __builtin_ffs*(). -config ARCH_CPU_IDLE_CUSTOM - bool "Custom arch_cpu_idle implementation" - default n +config ARCH_HAS_CUSTOM_CPU_IDLE + bool help This options allows applications to override the default arch idle implementation with a custom one. -config ARCH_CPU_ATOMIC_IDLE_CUSTOM - bool "Custom arch_cpu_atomic_idle implementation" - default n +config ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE + bool help This options allows applications to override the default arch idle implementation with a custom one. diff --git a/arch/arc/core/cpu_idle.S b/arch/arc/core/cpu_idle.S index 797aff870ca..e0eaf4af2a1 100644 --- a/arch/arc/core/cpu_idle.S +++ b/arch/arc/core/cpu_idle.S @@ -26,7 +26,7 @@ SECTION_VAR(BSS, z_arc_cpu_sleep_mode) .align 4 .word 0 -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE /* * @brief Put the CPU in low-power mode * @@ -51,7 +51,7 @@ SECTION_FUNC(TEXT, arch_cpu_idle) nop #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE /* * @brief Put the CPU in low-power mode, entered with IRQs locked * diff --git a/arch/arm/core/cortex_a_r/cpu_idle.S b/arch/arm/core/cortex_a_r/cpu_idle.S index 38168a5eae9..044c0038239 100644 --- a/arch/arm/core/cortex_a_r/cpu_idle.S +++ b/arch/arm/core/cortex_a_r/cpu_idle.S @@ -49,7 +49,7 @@ _skip_\@: #endif /* CONFIG_ARM_ON_ENTER_CPU_IDLE_HOOK */ .endm -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE SECTION_FUNC(TEXT, arch_cpu_idle) #ifdef CONFIG_TRACING push {r0, lr} @@ -71,7 +71,7 @@ SECTION_FUNC(TEXT, arch_cpu_idle) #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE SECTION_FUNC(TEXT, arch_cpu_atomic_idle) #ifdef CONFIG_TRACING push {r0, lr} diff --git a/arch/arm/core/cortex_m/cpu_idle.c b/arch/arm/core/cortex_m/cpu_idle.c index 3b48b19a003..5f373a88c9d 100644 --- a/arch/arm/core/cortex_m/cpu_idle.c +++ b/arch/arm/core/cortex_m/cpu_idle.c @@ -53,7 +53,7 @@ void z_arm_cpu_idle_init(void) } while (false) #endif -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE void arch_cpu_idle(void) { #if defined(CONFIG_TRACING) @@ -99,7 +99,7 @@ void arch_cpu_idle(void) } #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE void arch_cpu_atomic_idle(unsigned int key) { #if defined(CONFIG_TRACING) diff --git a/arch/arm64/core/cpu_idle.S b/arch/arm64/core/cpu_idle.S index a8c5bca49be..7681e212054 100644 --- a/arch/arm64/core/cpu_idle.S +++ b/arch/arm64/core/cpu_idle.S @@ -13,7 +13,7 @@ #include _ASM_FILE_PROLOGUE -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE GTEXT(arch_cpu_idle) SECTION_FUNC(TEXT, arch_cpu_idle) #ifdef CONFIG_TRACING @@ -27,7 +27,7 @@ SECTION_FUNC(TEXT, arch_cpu_idle) ret #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE GTEXT(arch_cpu_atomic_idle) SECTION_FUNC(TEXT, arch_cpu_atomic_idle) #ifdef CONFIG_TRACING diff --git a/arch/mips/core/cpu_idle.c b/arch/mips/core/cpu_idle.c index 51b53248c90..fd6621284a5 100644 --- a/arch/mips/core/cpu_idle.c +++ b/arch/mips/core/cpu_idle.c @@ -19,14 +19,14 @@ static ALWAYS_INLINE void mips_idle(unsigned int key) __asm__ volatile("wait"); } -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE void arch_cpu_idle(void) { mips_idle(1); } #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE void arch_cpu_atomic_idle(unsigned int key) { mips_idle(key); diff --git a/arch/nios2/core/cpu_idle.c b/arch/nios2/core/cpu_idle.c index 5678c270f57..b201ecfa84e 100644 --- a/arch/nios2/core/cpu_idle.c +++ b/arch/nios2/core/cpu_idle.c @@ -7,7 +7,7 @@ #include #include -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE void arch_cpu_idle(void) { /* Do nothing but unconditionally unlock interrupts and return to the @@ -17,7 +17,7 @@ void arch_cpu_idle(void) } #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE void arch_cpu_atomic_idle(unsigned int key) { /* Do nothing but restore IRQ state. This CPU does not have any diff --git a/arch/riscv/core/cpu_idle.c b/arch/riscv/core/cpu_idle.c index 5429e5490bc..413b911a53e 100644 --- a/arch/riscv/core/cpu_idle.c +++ b/arch/riscv/core/cpu_idle.c @@ -7,7 +7,7 @@ #include #include -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE void arch_cpu_idle(void) { sys_trace_idle(); @@ -16,7 +16,7 @@ void arch_cpu_idle(void) } #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE void arch_cpu_atomic_idle(unsigned int key) { sys_trace_idle(); diff --git a/arch/x86/core/cpuhalt.c b/arch/x86/core/cpuhalt.c index 47f0381e40e..b3f53a243e0 100644 --- a/arch/x86/core/cpuhalt.c +++ b/arch/x86/core/cpuhalt.c @@ -7,7 +7,7 @@ #include #include -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE __pinned_func void arch_cpu_idle(void) { @@ -18,7 +18,7 @@ void arch_cpu_idle(void) } #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE __pinned_func void arch_cpu_atomic_idle(unsigned int key) { diff --git a/arch/xtensa/core/cpu_idle.c b/arch/xtensa/core/cpu_idle.c index 13a49603ac0..48ddc58cb0a 100644 --- a/arch/xtensa/core/cpu_idle.c +++ b/arch/xtensa/core/cpu_idle.c @@ -6,7 +6,7 @@ #include #include -#ifndef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE void arch_cpu_idle(void) { sys_trace_idle(); @@ -14,7 +14,7 @@ void arch_cpu_idle(void) } #endif -#ifndef CONFIG_ARCH_CPU_ATOMIC_IDLE_CUSTOM +#ifndef CONFIG_ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE void arch_cpu_atomic_idle(unsigned int key) { sys_trace_idle(); diff --git a/soc/intel/intel_adsp/ace/Kconfig b/soc/intel/intel_adsp/ace/Kconfig index 96778d274a4..3a7d59e6dd1 100644 --- a/soc/intel/intel_adsp/ace/Kconfig +++ b/soc/intel/intel_adsp/ace/Kconfig @@ -8,7 +8,7 @@ config SOC_SERIES_INTEL_ADSP_ACE select ATOMIC_OPERATIONS_BUILTIN if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" select ARCH_HAS_COHERENCE select SCHED_IPI_SUPPORTED - select ARCH_CPU_IDLE_CUSTOM + select ARCH_HAS_CUSTOM_CPU_IDLE select DW_ICTL_ACE select SOC_HAS_RUNTIME_NUM_CPUS select HAS_PM diff --git a/soc/intel/intel_adsp/ace/power.c b/soc/intel/intel_adsp/ace/power.c index 5b9a6079374..43bbca3f8de 100644 --- a/soc/intel/intel_adsp/ace/power.c +++ b/soc/intel/intel_adsp/ace/power.c @@ -445,7 +445,7 @@ void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id) #endif /* CONFIG_PM */ -#ifdef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifdef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE __no_optimization void arch_cpu_idle(void) @@ -465,4 +465,4 @@ void arch_cpu_idle(void) __asm__ volatile ("waiti 0"); } -#endif /* CONFIG_ARCH_CPU_IDLE_CUSTOM */ +#endif /* CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE */ diff --git a/soc/intel/intel_adsp/cavs/power.c b/soc/intel/intel_adsp/cavs/power.c index be47f8dc109..9535dfd41d4 100644 --- a/soc/intel/intel_adsp/cavs/power.c +++ b/soc/intel/intel_adsp/cavs/power.c @@ -194,7 +194,7 @@ void pm_state_exit_post_ops(enum pm_state state, uint8_t substate_id) } #endif /* CONFIG_PM */ -#ifdef CONFIG_ARCH_CPU_IDLE_CUSTOM +#ifdef CONFIG_ARCH_HAS_CUSTOM_CPU_IDLE /* xt-clang removes any NOPs more than 8. So we need to set * no optimization to avoid those NOPs from being removed. * diff --git a/soc/ite/ec/it8xxx2/Kconfig b/soc/ite/ec/it8xxx2/Kconfig index 8966b6e2fe6..af6db8b3d83 100644 --- a/soc/ite/ec/it8xxx2/Kconfig +++ b/soc/ite/ec/it8xxx2/Kconfig @@ -4,8 +4,8 @@ config SOC_SERIES_IT8XXX2 select CPU_HAS_FPU if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "zephyr" || RISCV_ISA_EXT_M select HAS_PM - select ARCH_CPU_IDLE_CUSTOM - select ARCH_CPU_ATOMIC_IDLE_CUSTOM + select ARCH_HAS_CUSTOM_CPU_IDLE + select ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE if SOC_SERIES_IT8XXX2 diff --git a/soc/nordic/common/vpr/Kconfig b/soc/nordic/common/vpr/Kconfig index 76edb345ece..e51c31cbd95 100644 --- a/soc/nordic/common/vpr/Kconfig +++ b/soc/nordic/common/vpr/Kconfig @@ -17,8 +17,8 @@ config RISCV_CORE_NORDIC_VPR select RISCV_HAS_CLIC select RISCV_SOC_CONTEXT_SAVE select HAS_FLASH_LOAD_OFFSET - select ARCH_CPU_IDLE_CUSTOM - select ARCH_CPU_ATOMIC_IDLE_CUSTOM + select ARCH_HAS_CUSTOM_CPU_IDLE + select ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE select INCLUDE_RESET_VECTOR help Enable support for the RISC-V Nordic VPR core.