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soc: msp432p4xx: Get CPU clock frequency from DTS

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The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit is contained in:
Piotr Zięcik 2019-04-11 14:28:52 +02:00 • committed by Carles Cufí
commit a8b787f4e7
5 changed files with 10 additions and 5 deletions
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3
ext/hal/ti/simplelink/source/ti/devices/msp432p4xx/startup_system_files/system_msp432p401m.c
View file

@ -44,6 +44,7 @@
#include <stdint.h> #include <stdint.h>
#include <ti/devices/msp432p4xx/inc/msp.h> #include <ti/devices/msp432p4xx/inc/msp.h>
#include <generated_dts_board.h>
/*--------------------- Configuration Instructions ---------------------------- /*--------------------- Configuration Instructions ----------------------------
1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1: 1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1:
@ -68,7 +69,7 @@
// <12000000> 12 MHz // <12000000> 12 MHz
// <24000000> 24 MHz // <24000000> 24 MHz
// <48000000> 48 MHz // <48000000> 48 MHz
#define __SYSTEM_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC #define __SYSTEM_CLOCK DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY
/*--------------------- Power Regulator Configuration -----------------------*/ /*--------------------- Power Regulator Configuration -----------------------*/
// Power Regulator Mode // Power Regulator Mode

3
ext/hal/ti/simplelink/source/ti/devices/msp432p4xx/startup_system_files/system_msp432p401r.c
View file

@ -44,6 +44,7 @@
#include <stdint.h> #include <stdint.h>
#include <ti/devices/msp432p4xx/inc/msp.h> #include <ti/devices/msp432p4xx/inc/msp.h>
#include <generated_dts_board.h>
/*--------------------- Configuration Instructions ---------------------------- /*--------------------- Configuration Instructions ----------------------------
1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1: 1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1:
@ -68,7 +69,7 @@
// <12000000> 12 MHz // <12000000> 12 MHz
// <24000000> 24 MHz // <24000000> 24 MHz
// <48000000> 48 MHz // <48000000> 48 MHz
#define __SYSTEM_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC #define __SYSTEM_CLOCK DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY
/*--------------------- Power Regulator Configuration -----------------------*/ /*--------------------- Power Regulator Configuration -----------------------*/
// Power Regulator Mode // Power Regulator Mode

3
ext/hal/ti/simplelink/source/ti/devices/msp432p4xx/startup_system_files/system_msp432p4111.c
View file

@ -44,6 +44,7 @@
#include <stdint.h> #include <stdint.h>
#include <ti/devices/msp432p4xx/inc/msp.h> #include <ti/devices/msp432p4xx/inc/msp.h>
#include <generated_dts_board.h>
/*--------------------- Configuration Instructions ---------------------------- /*--------------------- Configuration Instructions ----------------------------
1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1: 1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1:
@ -68,7 +69,7 @@
// <12000000> 12 MHz // <12000000> 12 MHz
// <24000000> 24 MHz // <24000000> 24 MHz
// <48000000> 48 MHz // <48000000> 48 MHz
#define __SYSTEM_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC #define __SYSTEM_CLOCK DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY
/*--------------------- Power Regulator Configuration -----------------------*/ /*--------------------- Power Regulator Configuration -----------------------*/
// Power Regulator Mode // Power Regulator Mode

3
ext/hal/ti/simplelink/source/ti/devices/msp432p4xx/startup_system_files/system_msp432p411v.c
View file

@ -44,6 +44,7 @@
#include <stdint.h> #include <stdint.h>
#include <ti/devices/msp432p4xx/inc/msp.h> #include <ti/devices/msp432p4xx/inc/msp.h>
#include <generated_dts_board.h>
/*--------------------- Configuration Instructions ---------------------------- /*--------------------- Configuration Instructions ----------------------------
1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1: 1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1:
@ -68,7 +69,7 @@
// <12000000> 12 MHz // <12000000> 12 MHz
// <24000000> 24 MHz // <24000000> 24 MHz
// <48000000> 48 MHz // <48000000> 48 MHz
#define __SYSTEM_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC #define __SYSTEM_CLOCK DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY
/*--------------------- Power Regulator Configuration -----------------------*/ /*--------------------- Power Regulator Configuration -----------------------*/
// Power Regulator Mode // Power Regulator Mode

3
ext/hal/ti/simplelink/source/ti/devices/msp432p4xx/startup_system_files/system_msp432p411y.c
View file

@ -44,6 +44,7 @@
#include <stdint.h> #include <stdint.h>
#include <ti/devices/msp432p4xx/inc/msp.h> #include <ti/devices/msp432p4xx/inc/msp.h>
#include <generated_dts_board.h>
/*--------------------- Configuration Instructions ---------------------------- /*--------------------- Configuration Instructions ----------------------------
1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1: 1. If you prefer to halt the Watchdog Timer, set __HALT_WDT to 1:
@ -68,7 +69,7 @@
// <12000000> 12 MHz // <12000000> 12 MHz
// <24000000> 24 MHz // <24000000> 24 MHz
// <48000000> 48 MHz // <48000000> 48 MHz
#define __SYSTEM_CLOCK CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC #define __SYSTEM_CLOCK DT_ARM_CORTEX_M4F_0_CLOCK_FREQUENCY
/*--------------------- Power Regulator Configuration -----------------------*/ /*--------------------- Power Regulator Configuration -----------------------*/
// Power Regulator Mode // Power Regulator Mode