ARC: forbid FIRQ or multiple register banks w/ 1 IRQ priority level
Don't allow to enable multiple register banks / fast interrupts if we have only one interrupt priority level. NOTE: we duplicate some checks by adding dependencies to ARC Kconfig and adding build-time checks in C code. We do it intentionally as for some reason we can violate dependencies in architecture-level Kconfig by adding incorrect default in SoC-level Kconfig. Such violation happens without any warnings / errors from the Kconfig. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
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@ -136,6 +136,7 @@ config NUM_IRQS
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config RGF_NUM_BANKS
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config RGF_NUM_BANKS
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int "Number of General Purpose Register Banks"
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int "Number of General Purpose Register Banks"
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depends on ARC_FIRQ
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depends on ARC_FIRQ
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depends on NUM_IRQ_PRIO_LEVELS > 1
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range 1 2
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range 1 2
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default 2
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default 2
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help
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help
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@ -145,10 +146,15 @@ config RGF_NUM_BANKS
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If fast interrupts are supported but there is only 1
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If fast interrupts are supported but there is only 1
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register bank, the fast interrupt handler must save
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register bank, the fast interrupt handler must save
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and restore general purpose registers.
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and restore general purpose registers.
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NOTE: it's required to have more than one interrupt priority level
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to use second register bank - otherwise all interrupts will use
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same register bank. Such configuration isn't supported in software
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and it is not beneficial from the performance point of view.
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config ARC_FIRQ
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config ARC_FIRQ
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bool "FIRQ enable"
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bool "FIRQ enable"
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depends on ISA_ARCV2
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depends on ISA_ARCV2
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depends on NUM_IRQ_PRIO_LEVELS > 1
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default y
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default y
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help
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help
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Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
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Fast interrupts are supported (FIRQ). If FIRQ enabled, for interrupts
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@ -156,6 +162,10 @@ config ARC_FIRQ
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other regs will be saved according to the number of register bank;
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other regs will be saved according to the number of register bank;
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If FIRQ is disabled, the handle of interrupts with highest priority
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If FIRQ is disabled, the handle of interrupts with highest priority
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will be same with other interrupts.
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will be same with other interrupts.
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NOTE: we don't allow the configuration with FIRQ enabled and only one
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interrupt priority level (so all interrupts are FIRQ). Such
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configuration isn't supported in software and it is not beneficial
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from the performance point of view.
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config ARC_FIRQ_STACK
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config ARC_FIRQ_STACK
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bool "Enable separate firq stack"
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bool "Enable separate firq stack"
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@ -43,6 +43,40 @@
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#endif
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#endif
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#endif
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#endif
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#if defined(CONFIG_ARC_FIRQ) && defined(CONFIG_ISA_ARCV3)
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#error "Unsupported configuration: ARC_FIRQ and ISA_ARCV3"
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#endif
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/*
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* We don't allow the configuration with FIRQ enabled and only one interrupt priority level
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* (so all interrupts are FIRQ). Such configuration isn't supported in software and it is not
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* beneficial from the performance point of view.
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*/
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#if defined(CONFIG_ARC_FIRQ) && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
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#error "Unsupported configuration: ARC_FIRQ and (NUM_IRQ_PRIO_LEVELS < 2)"
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#endif
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#if CONFIG_RGF_NUM_BANKS > 1 && !defined(CONFIG_ARC_FIRQ)
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#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and !ARC_FIRQ"
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#endif
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/*
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* It's required to have more than one interrupt priority level to use second register bank
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* - otherwise all interrupts will use same register bank. Such configuration isn't supported in
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* software and it is not beneficial from the performance point of view.
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*/
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#if CONFIG_RGF_NUM_BANKS > 1 && CONFIG_NUM_IRQ_PRIO_LEVELS < 2
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#error "Unsupported configuration: (RGF_NUM_BANKS > 1) and (NUM_IRQ_PRIO_LEVELS < 2)"
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#endif
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#if defined(CONFIG_ARC_FIRQ_STACK) && !defined(CONFIG_ARC_FIRQ)
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#error "Unsupported configuration: ARC_FIRQ_STACK and !ARC_FIRQ"
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#endif
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#if defined(CONFIG_ARC_FIRQ_STACK) && CONFIG_RGF_NUM_BANKS < 2
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#error "Unsupported configuration: ARC_FIRQ_STACK and (RGF_NUM_BANKS < 2)"
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#endif
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#ifndef _ASMLANGUAGE
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#ifndef _ASMLANGUAGE
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#ifdef __cplusplus
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#ifdef __cplusplus
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