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dts: espressif: Update AMP sram nodes for ESP32 and ESP32-S3

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Set AMP dts nodes (ipm, mbox, ...) to use fixed locations in reserved
memory areas. Those areas memories are delimited in the `memory.h`.
Size of the occupied areas can be calculated but the dts nodes addresses
needs to be set manually in every case.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
This commit is contained in:
Marek Matej 2024-12-10 00:14:44 +01:00 • committed by Benjamin Cabé
commit a7a05b9e7f
2 changed files with 35 additions and 35 deletions
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54
dts/xtensa/espressif/esp32/esp32_common.dtsi
View file

@ -114,12 +114,37 @@
ipmmem0: memory@3ffe5230 {
compatible = "mmio-sram";
reg = <0x3FFE5230 0x400>;
reg = <0x3ffe5230 0x400>;
};
shm0: memory@3ffe5630 {
compatible = "mmio-sram";
reg = <0x3FFE5630 0x3C00>;
reg = <0x3ffe5630 0x4000>;
};
ipm0: ipm@3ffe9630 {
compatible = "espressif,esp32-ipm";
reg = <0x3ffe9630 0x8>;
status = "disabled";
shared-memory = <&ipmmem0>;
shared-memory-size = <0x400>;
interrupts =
<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
};
mbox0: mbox@3ffe9638 {
compatible = "espressif,mbox-esp32";
reg = <0x3ffe9638 0x8>;
status = "disabled";
shared-memory = <&ipmmem0>;
shared-memory-size = <0x400>;
interrupts =
<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
#mbox-cells = <1>;
};
intc: interrupt-controller@3ff00104 {
@ -172,31 +197,6 @@
status = "disabled";
};
ipm0: ipm@3ffed238 {
compatible = "espressif,esp32-ipm";
reg = <0x3FFED238 0x8>;
status = "disabled";
shared-memory = <&ipmmem0>;
shared-memory-size = <0x400>;
interrupts =
<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
};
mbox0: mbox@3ffed240 {
compatible = "espressif,mbox-esp32";
reg = <0x3FFED240 0x8>;
status = "disabled";
shared-memory = <&ipmmem0>;
shared-memory-size = <0x400>;
interrupts =
<FROM_CPU_INTR0_SOURCE IRQ_DEFAULT_PRIORITY 0>,
<FROM_CPU_INTR1_SOURCE IRQ_DEFAULT_PRIORITY 0>;
interrupt-parent = <&intc>;
#mbox-cells = <1>;
};
ipi0: ipi@3f4c0058 {
compatible = "espressif,crosscore-interrupt";
reg = <0x3f4c0058 0x4>;

16
dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi
View file

@ -104,19 +104,19 @@
zephyr,memory-region = "SRAM2";
};
ipmmem0: memory@3fcb2000 {
ipmmem0: memory@3fce5000 {
compatible = "mmio-sram";
reg = <0x3fcb2000 0x400>;
reg = <0x3fce5000 0x400>;
};
shm0: memory@3fcb2400 {
shm0: memory@3fce5400 {
compatible = "mmio-sram";
reg = <0x3fcb2400 0x3c00>;
reg = <0x3fce5400 0x4000>;
};
ipm0: ipm@3fcb6000 {
ipm0: ipm@3fce9400 {
compatible = "espressif,esp32-ipm";
reg = <0x3fcb6000 0x8>;
reg = <0x3fce9400 0x8>;
status = "disabled";
shared-memory = <&ipmmem0>;
shared-memory-size = <0x400>;
@ -126,9 +126,9 @@
interrupt-parent = <&intc>;
};
mbox0: mbox@3fcb6008 {
mbox0: mbox@3fce9408 {
compatible = "espressif,mbox-esp32";
reg = <0x3fcb6008 0x8>;
reg = <0x3fce9408 0x8>;
status = "disabled";
shared-memory = <&ipmmem0>;
shared-memory-size = <0x400>;